qemu-e2k/hw/riscv
Daniel Henrique Barboza f2d44e9c1e hw/riscv/virt.c: make aclint compatible with 'qtest' accel
The 'virt' machine makes assumptions on the Advanced Core-Local
Interruptor, or aclint, based on 'tcg_enabled()' conditionals.  This
will impact MSI related tests support when adding a RISC-V 'virt' libqos
machine. The accelerator used in that case, 'qtest', isn't being
accounted for and we'll error out if we try to enable aclint.

Create a new virt_aclint_allowed() helper to gate the aclint code
considering both TCG and 'qtest' accelerators. The error message is
left untouched, mentioning TCG only, because we don't expect the
regular user to be aware of 'qtest'.

We want to add 'qtest' support for aclint only, leaving the TCG specific
bits out of it. This is done by changing the current format we use
today:

if (tcg_enabled()) {
   if (s->have_aclint) { - aclint logic - }
   else { - non-aclint, TCG logic - }
}

into:

if (virt_aclint_allowed() && s->have_aclint) {
 - aclint logic -
} else if (tcg_enabled()) {
 - non-aclint, TCG logic -
}

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240217192607.32565-6-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-03-08 16:46:59 +10:00
..
boot.c hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM 2024-03-08 15:41:31 +10:00
Kconfig target/riscv: SMBIOS support for RISC-V virt machine 2024-02-09 20:43:14 +10:00
meson.build hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
microchip_pfsoc.c hw/riscv: use qemu_configure_nic_device() 2024-02-02 16:23:47 +00:00
numa.c hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix() 2024-02-09 20:43:14 +10:00
opentitan.c hw/riscv: opentitan: Fixup local variables shadowing 2023-09-29 10:07:20 +02:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c hw/riscv/shakti_c: Check CPU type in machine_run_board_init() 2024-01-05 16:20:15 +01:00
sifive_e.c riscv: Fix SiFive E CLINT clock frequency 2023-11-22 13:57:19 +10:00
sifive_u.c target/riscv: support new isa extension detection devicetree properties 2024-02-09 20:43:14 +10:00
spike.c target/riscv: support new isa extension detection devicetree properties 2024-02-09 20:43:14 +10:00
virt-acpi-build.c hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables 2024-03-08 16:42:55 +10:00
virt.c hw/riscv/virt.c: make aclint compatible with 'qtest' accel 2024-03-08 16:46:59 +10:00