dc5e072188
PPC TCG supports SMT CPU configurations for non-hypervisor state, so permit POWER8-10 pseries machines to enable SMT. This requires PIR and TIR be set, because that's how sibling thread matching is done by TCG. spapr's nested-HV capability does not currently coexist with SMT, so that combination is prohibited (interestingly somewhat analogous to LPAR-per-core mode on real hardware which also does not support KVM). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: Also test smp_threads when checking for POWER8 CPU and above ] Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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| .. | ||
| e500-ccsr.h | ||
| e500.c | ||
| e500.h | ||
| e500plat.c | ||
| fdt.c | ||
| fw_cfg.c | ||
| Kconfig | ||
| mac_newworld.c | ||
| mac_oldworld.c | ||
| meson.build | ||
| mpc8544_guts.c | ||
| mpc8544ds.c | ||
| pef.c | ||
| pegasos2.c | ||
| pnv_bmc.c | ||
| pnv_core.c | ||
| pnv_homer.c | ||
| pnv_lpc.c | ||
| pnv_occ.c | ||
| pnv_pnor.c | ||
| pnv_psi.c | ||
| pnv_sbe.c | ||
| pnv_xscom.c | ||
| pnv.c | ||
| ppc4xx_devs.c | ||
| ppc4xx_pci.c | ||
| ppc4xx_sdram.c | ||
| ppc405_boards.c | ||
| ppc405_uc.c | ||
| ppc405.h | ||
| ppc440_bamboo.c | ||
| ppc440_pcix.c | ||
| ppc440_uc.c | ||
| ppc440.h | ||
| ppc_booke.c | ||
| ppc.c | ||
| ppce500_spin.c | ||
| prep_systemio.c | ||
| prep.c | ||
| rs6000_mc.c | ||
| sam460ex.c | ||
| spapr_caps.c | ||
| spapr_cpu_core.c | ||
| spapr_drc.c | ||
| spapr_events.c | ||
| spapr_hcall.c | ||
| spapr_iommu.c | ||
| spapr_irq.c | ||
| spapr_nested.c | ||
| spapr_numa.c | ||
| spapr_nvdimm.c | ||
| spapr_ovec.c | ||
| spapr_pci_nvlink2.c | ||
| spapr_pci_vfio.c | ||
| spapr_pci.c | ||
| spapr_rng.c | ||
| spapr_rtas_ddw.c | ||
| spapr_rtas.c | ||
| spapr_rtc.c | ||
| spapr_softmmu.c | ||
| spapr_tpm_proxy.c | ||
| spapr_vio.c | ||
| spapr_vof.c | ||
| spapr.c | ||
| trace-events | ||
| trace.h | ||
| virtex_ml507.c | ||
| vof.c | ||