Sebastian Macke bf961b5278 target-openrisc: Correct handling of page faults. ... The result of (rw & 0) is always zero and therefore a logic false. The whole comparison will therefore never be executed, it is a obvious bug, we should use !(rw & 1) here. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com>		2013-10-03 16:24:24 +08:00
..
cpu.c	cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"	2013-07-29 15:29:15 +02:00
cpu.h	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
exception_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
exception.c
exception.h
fpu_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
gdbstub.c	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
helper.h
int_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
interrupt_helper.c	cpu: Move halted and interrupt_request fields to CPUState	2013-03-12 10:35:55 +01:00
interrupt.c	cpu: Replace do_interrupt() by CPUClass::do_interrupt method	2013-03-12 10:35:55 +01:00
machine.c	target-openrisc: Register VMStateDescription for OpenRISCCPU	2013-06-28 13:25:12 +02:00
Makefile.objs	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
mmu_helper.c
mmu.c	target-openrisc: Correct handling of page faults.	2013-10-03 16:24:24 +08:00
sys_helper.c	cpu: Move halted and interrupt_request fields to CPUState	2013-03-12 10:35:55 +01:00
translate.c	tcg: Change tcg_gen_exit_tb argument to uintptr_t	2013-09-02 09:08:30 -07:00