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bff384a4fb
qemu-e2k/target-mips
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Leon Alrae bff384a4fb hw/mips_malta: add CPS to Malta board 
If the user specifies smp > 1 and the CPU with CM GCR support, then
create Coherent Processing System (which takes care of instantiating CPUs)
rather than CPUs directly and connect i8259 and cbus to the pins exposed by
CPS. However, there is no GIC yet, thus CPS exposes CPU's IRQ pins so use
the same pin numbers as before.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30 09:13:59 +01:00
..
cpu-qom.h
cpu.c include/qemu/osdep.h: Don't include qapi/error.h 2016-03-22 22:20:15 +01:00
cpu.h hw/mips_malta: add CPS to Malta board 2016-03-30 09:13:59 +01:00
dsp_helper.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
gdbstub.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
helper.c log: do not unnecessarily include qom/cpu.h 2016-02-03 09:19:10 +00:00
helper.h target-mips: implement R6 multi-threading 2016-02-26 08:59:17 +00:00
kvm_mips.h
kvm.c mips/kvm: Support MSA in MIPS KVM guests 2016-02-26 08:59:17 +00:00
lmi_helper.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
machine.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
Makefile.objs
mips-defs.h
mips-semi.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
msa_helper.c mips: Clean up includes 2016-01-23 14:30:04 +00:00
op_helper.c target-mips: implement R6 multi-threading 2016-02-26 08:59:17 +00:00
TODO
translate_init.c target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs 2016-03-23 13:36:55 +00:00
translate.c hw/mips_malta: add CPS to Malta board 2016-03-30 09:13:59 +01:00