b8fc619550
Avoid the interrupt controller directly access the 'first_cpu' global. Pass 'cpu' from the board code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231024083010.12453-2-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
43 lines
850 B
C
43 lines
850 B
C
/*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* QEMU Motorola 680x0 IRQ Controller
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*
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* (c) 2020 Laurent Vivier <laurent@vivier.eu>
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*
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*/
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#ifndef M68K_IRQC_H
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#define M68K_IRQC_H
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#include "hw/sysbus.h"
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#define TYPE_M68K_IRQC "m68k-irq-controller"
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#define M68K_IRQC(obj) OBJECT_CHECK(M68KIRQCState, (obj), \
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TYPE_M68K_IRQC)
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#define M68K_IRQC_AUTOVECTOR_BASE 25
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enum {
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M68K_IRQC_LEVEL_1 = 0,
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M68K_IRQC_LEVEL_2,
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M68K_IRQC_LEVEL_3,
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M68K_IRQC_LEVEL_4,
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M68K_IRQC_LEVEL_5,
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M68K_IRQC_LEVEL_6,
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M68K_IRQC_LEVEL_7,
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};
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#define M68K_IRQC_LEVEL_NUM (M68K_IRQC_LEVEL_7 - M68K_IRQC_LEVEL_1 + 1)
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typedef struct M68KIRQCState {
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SysBusDevice parent_obj;
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uint8_t ipr;
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ArchCPU *cpu;
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/* statistics */
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uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM];
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} M68KIRQCState;
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#endif
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