OpenE2K/qemu-e2k
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c1c9a10fb1
qemu-e2k/target
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Mateja Marjanovic c1c9a10fb1 target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 
The old version of the helper for the INSERT.<B|H|W|D> MSA instructions
has been replaced with four helpers that don't use switch, and change
the endianness of the given index, when executed on a big endian host.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1554212605-16457-6-git-send-email-mateja.marjanovic@rt-rk.com>
2019-05-26 17:33:16 +02:00
..
alpha target/alpha: Fix user-only floating-point exceptions 2019-05-19 07:30:03 -07:00
arm arm: Remove unnecessary includes of hw/arm/arm.h 2019-05-23 14:47:43 +01:00
cris Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
hppa tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
i386 Introduce qemu_guest_getrandom. 2019-05-23 12:57:17 +01:00
lm32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
m68k code cleanup, switch to transaction_failed hook 2019-05-17 10:28:23 +01:00
microblaze tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
mips target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-26 17:33:16 +02:00
moxie tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
nios2 Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
openrisc tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
ppc target/ppc: Use qemu_guest_getrandom for DARN 2019-05-22 12:38:54 -04:00
riscv Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
s390x s390x update: 2019-05-21 16:30:13 +01:00
sh4 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
sparc Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
tilegx target/tilegx: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00
tricore Add CPUClass::tlb_fill. 2019-05-16 13:15:08 +01:00
unicore32 tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
xtensa target/xtensa: SR reorganization and options for modern cores 2019-05-21 10:44:21 +01:00