c2b33d0be9
The following improvements are made for predicated HVX instructions
During gen_commit_hvx, unconditionally move the "new" value into
the dest
Don't set slot_cancelled
Remove runtime bookkeeping of which registers were updated
Reduce the cases where gen_log_vreg_write[_pair] is called
It's only needed for special operands VxxV and VyV
Remove gen_log_qreg_write
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-15-tsimpson@quicinc.com>
253 lines
9.6 KiB
Python
Executable File
253 lines
9.6 KiB
Python
Executable File
#!/usr/bin/env python3
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##
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## Copyright(c) 2022-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sys
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import re
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import string
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import hex_common
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##
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## Helpers for gen_analyze_func
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##
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def is_predicated(tag):
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return 'A_CONDEXEC' in hex_common.attribdict[tag]
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def analyze_opn_old(f, tag, regtype, regid, regno):
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regN = "%s%sN" % (regtype, regid)
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predicated = "true" if is_predicated(tag) else "false"
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if (regtype == "R"):
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if (regid in {"ss", "tt"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"dd", "ee", "xx", "yy"}):
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f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
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f.write(" ctx_log_reg_write_pair(ctx, %s, %s);\n" % \
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(regN, predicated))
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elif (regid in {"s", "t", "u", "v"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"d", "e", "x", "y"}):
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f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
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f.write(" ctx_log_reg_write(ctx, %s, %s);\n" % \
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(regN, predicated))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid in {"s", "t", "u", "v"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"d", "e", "x"}):
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f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
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f.write(" ctx_log_pred_write(ctx, %s);\n" % (regN))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "C"):
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if (regid == "ss"):
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f.write("// const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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elif (regid == "dd"):
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f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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f.write(" ctx_log_reg_write_pair(ctx, %s, %s);\n" % \
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(regN, predicated))
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elif (regid == "s"):
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f.write("// const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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elif (regid == "d"):
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f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
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(regN, regno))
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f.write(" ctx_log_reg_write(ctx, %s, %s);\n" % \
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(regN, predicated))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "M"):
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if (regid == "u"):
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f.write("// const int %s = insn->regno[%d];\n"% \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "V"):
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newv = "EXT_DFL"
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if (hex_common.is_new_result(tag)):
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newv = "EXT_NEW"
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elif (hex_common.is_tmp_result(tag)):
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newv = "EXT_TMP"
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if (regid in {"dd", "xx"}):
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f.write(" const int %s = insn->regno[%d];\n" %\
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(regN, regno))
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f.write(" ctx_log_vreg_write_pair(ctx, %s, %s, %s);\n" % \
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(regN, newv, predicated))
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elif (regid in {"uu", "vv"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"s", "u", "v", "w"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"d", "x", "y"}):
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f.write(" const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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f.write(" ctx_log_vreg_write(ctx, %s, %s, %s);\n" % \
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(regN, newv, predicated))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "Q"):
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if (regid in {"d", "e", "x"}):
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f.write(" const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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f.write(" ctx_log_qreg_write(ctx, %s);\n" % (regN))
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elif (regid in {"s", "t", "u", "v"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "G"):
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if (regid in {"dd"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"d"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"ss"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"s"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "S"):
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if (regid in {"dd"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"d"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"ss"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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elif (regid in {"s"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def analyze_opn_new(f, tag, regtype, regid, regno):
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regN = "%s%sN" % (regtype, regid)
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if (regtype == "N"):
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if (regid in {"s", "t"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "P"):
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if (regid in {"t", "u", "v"}):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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elif (regtype == "O"):
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if (regid == "s"):
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f.write("// const int %s = insn->regno[%d];\n" % \
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(regN, regno))
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else:
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print("Bad register parse: ", regtype, regid)
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else:
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print("Bad register parse: ", regtype, regid)
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def analyze_opn(f, tag, regtype, regid, toss, numregs, i):
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if (hex_common.is_pair(regid)):
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analyze_opn_old(f, tag, regtype, regid, i)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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analyze_opn_old(f,tag, regtype, regid, i)
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elif hex_common.is_new_val(regtype, regid, tag):
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analyze_opn_new(f, tag, regtype, regid, i)
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else:
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print("Bad register parse: ", regtype, regid, toss, numregs)
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else:
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print("Bad register parse: ", regtype, regid, toss, numregs)
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##
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## Generate the code to analyze the instruction
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## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
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## We produce:
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## static void analyze_A2_add(DisasContext *ctx)
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## {
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## Insn *insn G_GNUC_UNUSED = ctx->insn;
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## const int RdN = insn->regno[0];
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## ctx_log_reg_write(ctx, RdN, false);
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## // const int RsN = insn->regno[1];
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## // const int RtN = insn->regno[2];
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## }
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##
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def gen_analyze_func(f, tag, regs, imms):
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f.write("static void analyze_%s(DisasContext *ctx)\n" %tag)
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f.write('{\n')
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f.write(" Insn *insn G_GNUC_UNUSED = ctx->insn;\n")
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i=0
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## Analyze all the registers
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for regtype, regid, toss, numregs in regs:
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analyze_opn(f, tag, regtype, regid, toss, numregs, i)
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i += 1
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has_generated_helper = (not hex_common.skip_qemu_helper(tag) and
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not hex_common.is_idef_parser_enabled(tag))
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if (has_generated_helper and
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'A_SCALAR_LOAD' in hex_common.attribdict[tag]):
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f.write(" ctx->need_pkt_has_store_s1 = true;\n")
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f.write("}\n\n")
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def main():
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hex_common.read_semantics_file(sys.argv[1])
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hex_common.read_attribs_file(sys.argv[2])
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hex_common.read_overrides_file(sys.argv[3])
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hex_common.read_overrides_file(sys.argv[4])
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## Whether or not idef-parser is enabled is
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## determined by the number of arguments to
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## this script:
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##
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## 5 args. -> not enabled,
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## 6 args. -> idef-parser enabled.
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##
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## The 6:th arg. then holds a list of the successfully
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## parsed instructions.
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is_idef_parser_enabled = len(sys.argv) > 6
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if is_idef_parser_enabled:
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hex_common.read_idef_parser_enabled_file(sys.argv[5])
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hex_common.calculate_attribs()
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tagregs = hex_common.get_tagregs()
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tagimms = hex_common.get_tagimms()
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with open(sys.argv[-1], 'w') as f:
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f.write("#ifndef HEXAGON_TCG_FUNCS_H\n")
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f.write("#define HEXAGON_TCG_FUNCS_H\n\n")
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for tag in hex_common.tags:
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gen_analyze_func(f, tag, tagregs[tag], tagimms[tag])
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f.write("#endif /* HEXAGON_TCG_FUNCS_H */\n")
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if __name__ == "__main__":
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main()
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