a78e9839ae
Add an asynchronous version of i2c_send() that requires the slave to explicitly acknowledge on the bus with i2c_ack(). The current master must use the new i2c_start_send_async() to indicate that it wants to do an asynchronous transfer. This allows the i2c core to check if the target slave supports this or not. This approach relies on adding a new enum i2c_event member, which is why a bunch of other devices needs changes in their event handling switches. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Message-Id: <20220601210831.67259-5-its@irrelevant.dk> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220630045133.32251-6-me@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
196 lines
4.7 KiB
C
196 lines
4.7 KiB
C
/*
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* Silicon Image SiI9022
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*
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* This is a pretty hollow emulation: all we do is acknowledge that we
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* exist (chip ID) and confirm that we get switched over into DDC mode
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* so the emulated host can proceed to read out EDID data. All subsequent
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* set-up of connectors etc will be acknowledged and ignored.
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*
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* Copyright (C) 2018 Linus Walleij
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qemu/module.h"
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#include "hw/i2c/i2c.h"
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#include "migration/vmstate.h"
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#include "hw/display/i2c-ddc.h"
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#include "trace.h"
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#include "qom/object.h"
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#define SII9022_SYS_CTRL_DATA 0x1a
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#define SII9022_SYS_CTRL_PWR_DWN 0x10
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#define SII9022_SYS_CTRL_AV_MUTE 0x08
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#define SII9022_SYS_CTRL_DDC_BUS_REQ 0x04
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#define SII9022_SYS_CTRL_DDC_BUS_GRTD 0x02
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#define SII9022_SYS_CTRL_OUTPUT_MODE 0x01
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#define SII9022_SYS_CTRL_OUTPUT_HDMI 1
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#define SII9022_SYS_CTRL_OUTPUT_DVI 0
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#define SII9022_REG_CHIPID 0x1b
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#define SII9022_INT_ENABLE 0x3c
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#define SII9022_INT_STATUS 0x3d
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#define SII9022_INT_STATUS_HOTPLUG 0x01;
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#define SII9022_INT_STATUS_PLUGGED 0x04;
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#define TYPE_SII9022 "sii9022"
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OBJECT_DECLARE_SIMPLE_TYPE(sii9022_state, SII9022)
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struct sii9022_state {
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I2CSlave parent_obj;
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uint8_t ptr;
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bool addr_byte;
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bool ddc_req;
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bool ddc_skip_finish;
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bool ddc;
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};
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static const VMStateDescription vmstate_sii9022 = {
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.name = "sii9022",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_I2C_SLAVE(parent_obj, sii9022_state),
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VMSTATE_UINT8(ptr, sii9022_state),
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VMSTATE_BOOL(addr_byte, sii9022_state),
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VMSTATE_BOOL(ddc_req, sii9022_state),
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VMSTATE_BOOL(ddc_skip_finish, sii9022_state),
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VMSTATE_BOOL(ddc, sii9022_state),
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VMSTATE_END_OF_LIST()
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}
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};
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static int sii9022_event(I2CSlave *i2c, enum i2c_event event)
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{
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sii9022_state *s = SII9022(i2c);
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switch (event) {
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case I2C_START_SEND:
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s->addr_byte = true;
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break;
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case I2C_START_RECV:
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break;
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case I2C_FINISH:
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break;
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case I2C_NACK:
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break;
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default:
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return -1;
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}
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return 0;
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}
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static uint8_t sii9022_rx(I2CSlave *i2c)
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{
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sii9022_state *s = SII9022(i2c);
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uint8_t res = 0x00;
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switch (s->ptr) {
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case SII9022_SYS_CTRL_DATA:
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if (s->ddc_req) {
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/* Acknowledge DDC bus request */
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res = SII9022_SYS_CTRL_DDC_BUS_GRTD | SII9022_SYS_CTRL_DDC_BUS_REQ;
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}
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break;
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case SII9022_REG_CHIPID:
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res = 0xb0;
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break;
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case SII9022_INT_STATUS:
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/* Something is cold-plugged in, no interrupts */
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res = SII9022_INT_STATUS_PLUGGED;
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break;
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default:
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break;
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}
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trace_sii9022_read_reg(s->ptr, res);
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s->ptr++;
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return res;
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}
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static int sii9022_tx(I2CSlave *i2c, uint8_t data)
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{
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sii9022_state *s = SII9022(i2c);
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if (s->addr_byte) {
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s->ptr = data;
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s->addr_byte = false;
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return 0;
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}
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switch (s->ptr) {
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case SII9022_SYS_CTRL_DATA:
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if (data & SII9022_SYS_CTRL_DDC_BUS_REQ) {
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s->ddc_req = true;
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if (data & SII9022_SYS_CTRL_DDC_BUS_GRTD) {
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s->ddc = true;
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/* Skip this finish since we just switched to DDC */
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s->ddc_skip_finish = true;
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trace_sii9022_switch_mode("DDC");
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}
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} else {
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s->ddc_req = false;
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s->ddc = false;
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trace_sii9022_switch_mode("normal");
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}
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break;
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default:
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break;
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}
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trace_sii9022_write_reg(s->ptr, data);
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s->ptr++;
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return 0;
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}
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static void sii9022_reset(DeviceState *dev)
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{
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sii9022_state *s = SII9022(dev);
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s->ptr = 0;
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s->addr_byte = false;
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s->ddc_req = false;
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s->ddc_skip_finish = false;
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s->ddc = false;
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}
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static void sii9022_realize(DeviceState *dev, Error **errp)
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{
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I2CBus *bus;
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bus = I2C_BUS(qdev_get_parent_bus(dev));
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i2c_slave_create_simple(bus, TYPE_I2CDDC, 0x50);
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}
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static void sii9022_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
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k->event = sii9022_event;
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k->recv = sii9022_rx;
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k->send = sii9022_tx;
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dc->reset = sii9022_reset;
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dc->realize = sii9022_realize;
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dc->vmsd = &vmstate_sii9022;
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}
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static const TypeInfo sii9022_info = {
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.name = TYPE_SII9022,
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.parent = TYPE_I2C_SLAVE,
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.instance_size = sizeof(sii9022_state),
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.class_init = sii9022_class_init,
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};
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static void sii9022_register_types(void)
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{
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type_register_static(&sii9022_info);
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}
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type_init(sii9022_register_types)
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