qemu-e2k

History

Huacai Chen c3173a35bc hw/mips: Add CPU IRQ3 delivery for KVM

Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <1588501221-1205-4-git-send-email-chenhc@lemote.com>

2020-06-01 13:28:21 +02:00

addr.c

Include hw/hw.h exactly where needed

2019-08-16 13:31:52 +02:00

boston.c

mips/boston: Plug memory leak in boston_mach_init()

2020-05-27 07:45:44 +02:00

cps.c

qdev: set properties with device_class_set_props()

2020-01-24 20:59:15 +01:00

fuloong2e.c

hw/mips/fuloong2e: Fix typo in Fuloong machine name