Richard Henderson c319dc1357 tcg: Use CPUClass::tlb_fill in cputlb.c ... We can now use the CPUClass hook instead of a named function. Create a static tlb_fill function to avoid other changes within cputlb.c. This also isolates the asserts within. Remove the named tlb_fill function from all of the targets. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2019-05-10 11:12:50 -07:00
..
insn_trans	decodetree: Add DisasContext argument to !function expanders	2019-05-06 11:18:34 -07:00
cpu_bits.h	RISC-V: Fixes to CSR_* register macros.	2019-03-19 05:13:24 -07:00
cpu_helper.c	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
cpu_user.h	RISC-V: linux-user support for RVE ABI	2019-03-19 05:14:39 -07:00
cpu.c	target/riscv: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
cpu.h	target/riscv: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
csr.c	RISC-V: Add support for vectored interrupts	2019-03-19 05:14:39 -07:00
fpu_helper.c
gdbstub.c	RISC-V: Add hooks to use the gdb xml files.	2019-03-19 05:13:24 -07:00
helper.h
insn16.decode	target/riscv: Convert quadrant 2 of RVXC insns to decodetree	2019-03-13 10:40:46 +01:00
insn32-64.decode
insn32.decode	target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists	2019-03-13 10:40:50 +01:00
instmap.h
Makefile.objs	target/riscv: Convert quadrant 0 of RVXC insns to decodetree	2019-03-13 10:34:06 +01:00
op_helper.c
pmp.c	riscv: pmp: Log pmp access errors as guest errors	2019-03-19 05:14:38 -07:00
pmp.h
trace-events	RISC-V: Convert trap debugging to trace events	2019-03-19 05:14:40 -07:00
translate.c	decodetree: Add DisasContext argument to !function expanders	2019-05-06 11:18:34 -07:00