qemu-e2k/include/hw/pci-host
Marcel Apfelbaum 9fa99d2519 hw/pci-host: Fix x86 Host Bridges 64bit PCI hole
Currently there is no MMIO range over 4G
reserved for PCI hotplug. Since the 32bit PCI hole
depends on the number of cold-plugged PCI devices
and other factors, it is very possible is too small
to hotplug PCI devices with large BARs.

Fix it by reserving 2G for I4400FX chipset
in order to comply with older Win32 Guest OSes
and 32G for Q35 chipset.

Even if the new defaults of pci-hole64-size will appear in
"info qtree" also for older machines, the property was
not implemented so no changes will be visible to guests.

Note this is a regression since prev QEMU versions had
some range reserved for 64bit PCI hotplug.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-11-16 17:46:53 +02:00
..
apb.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
gpex.h hw/pci-host/gpex: Set INTx index/gsi mapping 2017-09-14 18:43:18 +01:00
pam.h hw/i386: remove smram_update 2015-06-05 17:36:39 +02:00
ppce500.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
q35.h hw/pci-host: Fix x86 Host Bridges 64bit PCI hole 2017-11-16 17:46:53 +02:00
spapr.h hw/ppc: removing drc->detach_cb and drc->detach_cb_opaque 2017-05-25 11:31:33 +10:00
xilinx-pcie.h hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller 2017-02-21 23:49:29 +00:00