5d2555a1fe
From v8.1M, disabled-coprocessor handling changes slightly: * coprocessors 8, 9, 14 and 15 are also governed by the cp10 enable bit, like cp11 * an extra range of instruction patterns is considered to be inside the coprocessor space We previously marked these up with TODO comments; implement the correct behaviour. Unfortunately there is no ID register field which indicates this behaviour. We could in theory test an unrelated ID register which indicates guaranteed-to-be-in-v8.1M behaviour like ID_ISAR0.CmpBranch >= 3 (low-overhead-loops), but it seems better to simply define a new ARM_FEATURE_V8_1M feature flag and use it for this and other new-in-v8.1M behaviour that isn't identifiable from the ID registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201019151301.2046-3-peter.maydell@linaro.org
45 lines
1.9 KiB
Plaintext
45 lines
1.9 KiB
Plaintext
# M-profile UserFault.NOCP exception handling
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#
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# Copyright (c) 2020 Linaro, Ltd
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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# This file is processed by scripts/decodetree.py
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#
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# For M-profile, the architecture specifies that NOCP UsageFaults
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# should take precedence over UNDEF faults over the whole wide
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# range of coprocessor-space encodings, with the exception of
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# VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
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# v8M Arm ARM rule R_QLGM.) This isn't mandatory for v8.0M but we choose
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# to behave the same as v8.1M.
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# This decode is handled before any others (and in particular before
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# decoding FP instructions which are in the coprocessor space).
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# If the coprocessor is not present or disabled then we will generate
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# the NOCP exception; otherwise we let the insn through to the main decode.
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&nocp cp
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{
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# Special cases which do not take an early NOCP: VLLDM and VLSTM
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VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000
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# TODO: VSCCLRM (new in v8.1M) is similar:
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#VSCCLRM 1110 1100 1-01 1111 ---- 1011 ---- ---0
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NOCP 111- 1110 ---- ---- ---- cp:4 ---- ---- &nocp
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NOCP 111- 110- ---- ---- ---- cp:4 ---- ---- &nocp
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# From v8.1M onwards this range will also NOCP:
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NOCP_8_1 111- 1111 ---- ---- ---- ---- ---- ---- &nocp cp=10
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}
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