Filip Navara c67b6b719b target-arm: fix SRS/RFE instructions ... The encoding of 'IA' and 'DB' conditions was swapped. SRS instruction must store banked SPSR instead of CPSR at the specific address. Missing 'return' statement at the end of RFE handling. Fixed write-back code to reference correct registers. From: Hyeonsung Jang <hsjang@ok-labs.com> Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2009-10-17 23:52:16 +02:00
..
cpu.h	cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal	2009-08-24 08:21:42 -05:00
exec.h	Update to a hopefully more future proof FSF address	2009-07-16 20:47:01 +00:00
helper.c	Revert "Get rid of _t suffix"	2009-10-01 16:12:16 -05:00
helpers.h
iwmmxt_helper.c	Update to a hopefully more future proof FSF address	2009-07-16 20:47:01 +00:00
machine.c	Save/restore ARMv6 MMU state	2009-07-31 13:19:39 +01:00
neon_helper.c	rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN	2009-07-27 14:09:21 -05:00
op_addsub.h
op_helper.c	Revert "Get rid of _t suffix"	2009-10-01 16:12:16 -05:00
translate.c	target-arm: fix SRS/RFE instructions	2009-10-17 23:52:16 +02:00