Max Filippov 7ff7563fc1 target-xtensa: fix big-endian BBS/BBC implementation ... Quote from ISA, 2.1: For most Xtensa instructions, bit numbering is irrelevant; only the BBC and BBS instructions assign bit numbers to values on which the processor operates. The BBC/BBS instructions use big-endian bit ordering (0 is the most-significant bit) on a big-endian processor configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>		2012-07-28 09:06:40 +00:00
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core-dc232b
core-dc233c
core-fsf
core-dc232b.c
core-dc233c.c
core-fsf.c
cpu-qom.h
cpu.c
cpu.h	target-xtensa: update autorefill TLB entries conditionally	2012-06-09 10:45:03 +00:00
helper.c	target-xtensa: control page table lookup explicitly	2012-06-09 10:45:03 +00:00
helper.h	target-xtensa: switch to AREG0-free mode	2012-06-10 20:09:22 +00:00
machine.c
Makefile.objs	target-xtensa: switch to AREG0-free mode	2012-06-10 20:09:22 +00:00
op_helper.c	target-xtensa: switch to AREG0-free mode	2012-06-10 20:09:22 +00:00
overlay_tool.h
translate.c	target-xtensa: fix big-endian BBS/BBC implementation	2012-07-28 09:06:40 +00:00
xtensa-semi.c	target-xtensa: remove unnecessary include of dyngen-exec.h	2012-06-10 20:09:09 +00:00