3ab6e68cd0
On ARM, the Top Byte Ignore feature means that only 56 bits of the address are significant in the virtual address. We are required to give the entire 64-bit address to FAR_ELx on fault, which means that we do not "clean" the top byte early in TCG. This new interface allows us to flush all 256 possible aliases for a given page, currently missed by tlb_flush_page*. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20201016210754.818257-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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user | ||
address-spaces.h | ||
cpu_ldst.h | ||
cpu-all.h | ||
cpu-common.h | ||
cpu-defs.h | ||
cputlb.h | ||
exec-all.h | ||
gdbstub.h | ||
gen-icount.h | ||
helper-gen.h | ||
helper-head.h | ||
helper-proto.h | ||
helper-tcg.h | ||
hwaddr.h | ||
ioport.h | ||
log.h | ||
memattrs.h | ||
memop.h | ||
memory_ldst_cached.h.inc | ||
memory_ldst_phys.h.inc | ||
memory_ldst.h.inc | ||
memory-internal.h | ||
memory.h | ||
plugin-gen.h | ||
poison.h | ||
ram_addr.h | ||
ramblock.h | ||
ramlist.h | ||
softmmu-semi.h | ||
target_page.h | ||
tb-context.h | ||
tb-hash.h | ||
tb-lookup.h | ||
translator.h |