qemu-e2k/hw/intc
Peter Maydell 27f26bfed9 nvic: Make systick banked
For the v8M security extension, there should be two systick
devices, which use separate banked systick exceptions. The
register interface is banked in the same way as for other
banked registers, including the existence of an NS alias
region for secure code to access the nonsecure timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1512154296-5652-3-git-send-email-peter.maydell@linaro.org
2017-12-13 17:59:26 +00:00
..
allwinner-a10-pic.c
apic_common.c
apic.c
arm_gic_common.c
arm_gic_kvm.c
arm_gic.c
arm_gicv2m.c
arm_gicv3_common.c
arm_gicv3_cpuif.c
arm_gicv3_dist.c
arm_gicv3_its_common.c hw/intc/arm_gicv3_its: Don't call post_load on reset 2017-12-13 17:59:22 +00:00
arm_gicv3_its_kvm.c hw/intc/arm_gicv3_its: Implement full reset 2017-12-13 17:59:23 +00:00
arm_gicv3_kvm.c
arm_gicv3_redist.c
arm_gicv3.c
armv7m_nvic.c nvic: Make systick banked 2017-12-13 17:59:26 +00:00
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c
exynos4210_gic.c
gic_internal.h
gicv3_internal.h
grlib_irqmp.c
heathrow_pic.c
i8259_common.c
i8259.c
imx_avic.c
intc.c
ioapic_common.c
ioapic.c ioapic/tracing: Remove last DPRINTFs 2017-11-14 14:31:33 +01:00
lm32_pic.c
Makefile.objs openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) 2017-10-21 06:35:47 +09:00
mips_gic.c
nios2_iic.c
omap_intc.c
ompic.c openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) 2017-10-21 06:35:47 +09:00
openpic_kvm.c
openpic.c
pl190.c
puv3_intc.c
realview_gic.c
s390_flic_kvm.c
s390_flic.c
sh_intc.c
slavio_intctl.c
trace-events ioapic/tracing: Remove last DPRINTFs 2017-11-14 14:31:33 +01:00
vgic_common.h
xics_kvm.c xics/kvm: synchonize state before 'info pic' 2017-11-14 11:12:42 +11:00
xics_pnv.c
xics_spapr.c
xics.c xics/kvm: synchonize state before 'info pic' 2017-11-14 11:12:42 +11:00
xilinx_intc.c