581e109d58
Add an ssi_realize_and_unref(), for the benefit of callers who want to be able to create an SSI device, set QOM properties on it, and then do the realize-and-unref afterwards. The API works on the same principle as the recently added qdev_realize_and_undef(), sysbus_realize_and_undef(), etc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-9-peter.maydell@linaro.org
146 lines
3.5 KiB
C
146 lines
3.5 KiB
C
/*
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* QEMU Synchronous Serial Interface support
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*
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* Copyright (c) 2009 CodeSourcery.
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* Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
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* Copyright (c) 2012 PetaLogix Pty Ltd.
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* Written by Paul Brook
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*
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/ssi/ssi.h"
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#include "migration/vmstate.h"
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#include "qemu/module.h"
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#include "qapi/error.h"
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struct SSIBus {
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BusState parent_obj;
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};
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#define TYPE_SSI_BUS "SSI"
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#define SSI_BUS(obj) OBJECT_CHECK(SSIBus, (obj), TYPE_SSI_BUS)
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static const TypeInfo ssi_bus_info = {
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.name = TYPE_SSI_BUS,
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.parent = TYPE_BUS,
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.instance_size = sizeof(SSIBus),
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};
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static void ssi_cs_default(void *opaque, int n, int level)
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{
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SSISlave *s = SSI_SLAVE(opaque);
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bool cs = !!level;
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assert(n == 0);
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if (s->cs != cs) {
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SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
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if (ssc->set_cs) {
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ssc->set_cs(s, cs);
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}
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}
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s->cs = cs;
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}
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static uint32_t ssi_transfer_raw_default(SSISlave *dev, uint32_t val)
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{
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SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(dev);
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if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
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(!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
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ssc->cs_polarity == SSI_CS_NONE) {
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return ssc->transfer(dev, val);
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}
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return 0;
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}
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static void ssi_slave_realize(DeviceState *dev, Error **errp)
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{
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SSISlave *s = SSI_SLAVE(dev);
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SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
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if (ssc->transfer_raw == ssi_transfer_raw_default &&
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ssc->cs_polarity != SSI_CS_NONE) {
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qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
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}
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ssc->realize(s, errp);
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}
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static void ssi_slave_class_init(ObjectClass *klass, void *data)
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{
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SSISlaveClass *ssc = SSI_SLAVE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = ssi_slave_realize;
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dc->bus_type = TYPE_SSI_BUS;
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if (!ssc->transfer_raw) {
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ssc->transfer_raw = ssi_transfer_raw_default;
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}
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}
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static const TypeInfo ssi_slave_info = {
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.name = TYPE_SSI_SLAVE,
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.parent = TYPE_DEVICE,
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.class_init = ssi_slave_class_init,
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.class_size = sizeof(SSISlaveClass),
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.abstract = true,
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};
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bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp)
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{
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return qdev_realize_and_unref(dev, &bus->parent_obj, errp);
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}
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DeviceState *ssi_create_slave(SSIBus *bus, const char *name)
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{
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DeviceState *dev = qdev_new(name);
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ssi_realize_and_unref(dev, bus, &error_fatal);
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return dev;
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}
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SSIBus *ssi_create_bus(DeviceState *parent, const char *name)
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{
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BusState *bus;
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bus = qbus_create(TYPE_SSI_BUS, parent, name);
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return SSI_BUS(bus);
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}
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uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
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{
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BusState *b = BUS(bus);
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BusChild *kid;
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SSISlaveClass *ssc;
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uint32_t r = 0;
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QTAILQ_FOREACH(kid, &b->children, sibling) {
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SSISlave *slave = SSI_SLAVE(kid->child);
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ssc = SSI_SLAVE_GET_CLASS(slave);
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r |= ssc->transfer_raw(slave, val);
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}
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return r;
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}
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const VMStateDescription vmstate_ssi_slave = {
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.name = "SSISlave",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(cs, SSISlave),
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VMSTATE_END_OF_LIST()
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}
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};
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static void ssi_slave_register_types(void)
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{
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type_register_static(&ssi_bus_info);
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type_register_static(&ssi_slave_info);
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}
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type_init(ssi_slave_register_types)
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