Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer ...

In preparation for returning the number of insns generated
via the same pointer.  Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

2023-03-01 07:33:27 -10:00

..

cpu-param.h

Normalize header guard symbol definition

2022-05-11 16:50:26 +02:00

cpu.c

target/openrisc: Replace tb_pc() with tb->pc

2023-03-01 07:33:15 -10:00

cpu.h

target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu

2023-02-27 22:29:01 +01:00

disas.c

meson: target

2020-08-21 06:30:35 -04:00

exception_helper.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

exception.c

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

exception.h

compiler.h: replace QEMU_NORETURN with G_NORETURN

2022-04-21 17:03:51 +04:00

fpu_helper.c

softfloat: Name compare relation enum

2020-05-19 08:41:45 -07:00

gdbstub.c

gdbstub: extend GByteArray to read register helpers

2020-03-17 17:38:38 +00:00

helper.h

target/openrisc: Implement unordered fp comparisons

2019-09-04 12:57:59 -07:00

insns.decode

target/openrisc: Implement l.adrp

2019-09-04 12:59:00 -07:00

interrupt_helper.c

target/openrisc: Fix LGPL version number

2019-01-30 11:01:36 +01:00

interrupt.c

target/openrisc: Add interrupted CPU to log

2022-09-04 07:02:57 +01:00

Kconfig

meson: Introduce target-specific Kconfig

2021-07-09 18:21:34 +02:00

machine.c

Remove unnecessary minimum_version_id_old fields

2022-01-28 15:38:23 +01:00

meson.build

target/openrisc: Make openrisc_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

mmu.c

target/openrisc: Fix memory reading in debugger

2022-09-04 07:02:56 +01:00

sys_helper.c

accel/tcg: Remove will_exit argument from cpu_restore_state

2022-11-01 08:31:41 +11:00

translate.c

accel/tcg: Pass max_insn to gen_intermediate_code by pointer

2023-03-01 07:33:27 -10:00