cbf8b991f8
Update the reset value to match the latest ZynqMP register spec. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: c03e51d041db7f055596084891aeb1e856e32b9f.1513104804.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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aspeed_smc.c | ||
imx_spi.c | ||
Makefile.objs | ||
mss-spi.c | ||
omap_spi.c | ||
pl022.c | ||
ssi.c | ||
stm32f2xx_spi.c | ||
xilinx_spi.c | ||
xilinx_spips.c |