Klaus Jensen cc9bcee265 hw/nvme: clean up CC register write logic ... The SRIOV series exposed an issued with how CC register writes are handled and how CSTS is set in response to that. Specifically, after applying the SRIOV series, the controller could end up in a state with CC.EN set to '1' but with CSTS.RDY cleared to '0', causing drivers to expect CSTS.RDY to transition to '1' but timing out. Clean this up. Reviewed-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Lukasz Maniak <lukasz.maniak@linux.intel.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>		2022-06-23 23:24:29 +02:00
..
ctrl.c	hw/nvme: clean up CC register write logic	2022-06-23 23:24:29 +02:00
dif.c	hw/nvme: add new command abort case	2022-06-03 21:48:24 +02:00
dif.h	hw/nvme: 64-bit pi support	2022-03-03 09:30:21 +01:00
Kconfig
meson.build
ns.c	hw/nvme: Add support for Secondary Controller List	2022-06-23 23:24:28 +02:00
nvme.h	hw/nvme: Add support for the Virtualization Management command	2022-06-23 23:24:29 +02:00
subsys.c	hw/nvme: Add support for Secondary Controller List	2022-06-23 23:24:28 +02:00
trace-events	hw/nvme: Add support for the Virtualization Management command	2022-06-23 23:24:29 +02:00
trace.h