Peter Maydell ce187c3c15 hw/intc/arm_gicv3: Implement functions to identify next pending irq ... Implement the GICv3 logic to recalculate the highest priority pending interrupt for each CPU after some part of the GIC state has changed. We avoid unnecessary full recalculation where possible. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1465915112-29272-11-git-send-email-peter.maydell@linaro.org		2016-06-17 15:23:51 +01:00
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block	nbd: Avoid magic number for NBD max name size	2016-06-16 18:39:05 +02:00
crypto	crypto: aes: always rename internal symbols	2016-06-13 12:41:17 +01:00
disas
exec	tb hash: track translated blocks with qht	2016-06-11 17:11:16 -07:00
fpu
hw	hw/intc/arm_gicv3: Implement functions to identify next pending irq	2016-06-17 15:23:51 +01:00
io
libdecnumber
migration	migration: Define VMSTATE_UINT64_2DARRAY	2016-06-17 15:23:51 +01:00
monitor
net	vhost-net: save & restore vring enable state	2016-06-17 03:28:03 +03:00
qapi
qemu	bitops.h: Implement half-shuffle and half-unshuffle ops	2016-06-17 15:23:51 +01:00
qom	qom: API to get instance_size of a type	2016-06-17 16:33:48 +10:00
standard-headers	linux-headers: update	2016-06-14 13:34:50 +02:00
sysemu	pc, pci, virtio: new features, cleanups, fixes	2016-06-17 11:25:46 +01:00
ui
elf.h	Add PowerPC AT_HWCAP2 definitions	2016-06-14 10:41:38 +10:00
glib-compat.h
qemu-common.h
qemu-io.h
trace-tcg.h
trace.h