ce2918cbc3
The qemu coding standard is to use CamelCase for type and structure names,
and the pseries code follows that... sort of. There are quite a lot of
places where we bend the rules in order to preserve the capitalization of
internal acronyms like "PHB", "TCE", "DIMM" and most commonly "sPAPR".
That was a bad idea - it frequently leads to names ending up with hard to
read clusters of capital letters, and means they don't catch the eye as
type identifiers, which is kind of the point of the CamelCase convention in
the first place.
In short, keeping type identifiers look like CamelCase is more important
than preserving standard capitalization of internal "words". So, this
patch renames a heap of spapr internal type names to a more standard
CamelCase.
In addition to case changes, we also make some other identifier renames:
VIOsPAPR* -> SpaprVio*
The reverse word ordering was only ever used to mitigate the capital
cluster, so revert to the natural ordering.
VIOsPAPRVTYDevice -> SpaprVioVty
VIOsPAPRVLANDevice -> SpaprVioVlan
Brevity, since the "Device" didn't add useful information
sPAPRDRConnector -> SpaprDrc
sPAPRDRConnectorClass -> SpaprDrcClass
Brevity, and makes it clearer this is the same thing as a "DRC"
mentioned in many other places in the code
This is 100% a mechanical search-and-replace patch. It will, however,
conflict with essentially any and all outstanding patches touching the
spapr code.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
495 lines
16 KiB
C
495 lines
16 KiB
C
/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* Hypercall based emulated RTAS
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*
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* Copyright (c) 2010-2011 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "qemu/log.h"
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#include "qemu/error-report.h"
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#include "sysemu/sysemu.h"
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#include "hw/qdev.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/cpus.h"
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#include "sysemu/hw_accel.h"
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#include "kvm_ppc.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_vio.h"
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#include "hw/ppc/spapr_rtas.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "hw/ppc/ppc.h"
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#include "hw/boards.h"
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#include <libfdt.h>
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#include "hw/ppc/spapr_drc.h"
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#include "qemu/cutils.h"
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#include "trace.h"
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#include "hw/ppc/fdt.h"
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#include "target/ppc/mmu-hash64.h"
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#include "target/ppc/mmu-book3s-v3.h"
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static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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uint8_t c = rtas_ld(args, 0);
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SpaprVioDevice *sdev = vty_lookup(spapr, 0);
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if (!sdev) {
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rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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} else {
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vty_putchars(sdev, &c, sizeof(c));
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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}
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static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs, target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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if (nargs != 2 || nret != 1) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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cpu_stop_current();
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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if (nargs != 0 || nret != 1) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
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SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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target_ulong id;
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PowerPCCPU *cpu;
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if (nargs != 1 || nret != 2) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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id = rtas_ld(args, 0);
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cpu = spapr_find_cpu(id);
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if (cpu != NULL) {
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if (CPU(cpu)->halted) {
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rtas_st(rets, 1, 0);
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} else {
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rtas_st(rets, 1, 2);
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}
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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return;
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}
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/* Didn't find a matching cpu */
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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}
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static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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target_ulong id, start, r3;
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PowerPCCPU *newcpu;
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CPUPPCState *env;
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PowerPCCPUClass *pcc;
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target_ulong lpcr;
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if (nargs != 3 || nret != 1) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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id = rtas_ld(args, 0);
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start = rtas_ld(args, 1);
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r3 = rtas_ld(args, 2);
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newcpu = spapr_find_cpu(id);
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if (!newcpu) {
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/* Didn't find a matching cpu */
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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env = &newcpu->env;
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pcc = POWERPC_CPU_GET_CLASS(newcpu);
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if (!CPU(newcpu)->halted) {
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rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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return;
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}
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cpu_synchronize_state(CPU(newcpu));
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env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
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/* Enable Power-saving mode Exit Cause exceptions for the new CPU */
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lpcr = env->spr[SPR_LPCR];
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if (!pcc->interrupts_big_endian(callcpu)) {
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lpcr |= LPCR_ILE;
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}
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if (env->mmu_model == POWERPC_MMU_3_00) {
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/*
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* New cpus are expected to start in the same radix/hash mode
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* as the existing CPUs
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*/
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if (ppc64_v3_radix(callcpu)) {
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lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
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} else {
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lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
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}
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}
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ppc_store_lpcr(newcpu, lpcr);
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/*
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* Set the timebase offset of the new CPU to that of the invoking
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* CPU. This helps hotplugged CPU to have the correct timebase
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* offset.
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*/
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newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
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spapr_cpu_set_entry_state(newcpu, start, r3);
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qemu_cpu_kick(CPU(newcpu));
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
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/* Disable Power-saving mode Exit Cause exceptions for the CPU.
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* This could deliver an interrupt on a dying CPU and crash the
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* guest */
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ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
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cs->halted = 1;
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kvmppc_set_reg_ppc_online(cpu, 0);
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qemu_cpu_kick(cs);
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}
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static inline int sysparm_st(target_ulong addr, target_ulong len,
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const void *val, uint16_t vallen)
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{
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hwaddr phys = ppc64_phys_to_real(addr);
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if (len < 2) {
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return RTAS_OUT_SYSPARM_PARAM_ERROR;
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}
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stw_be_phys(&address_space_memory, phys, vallen);
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cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
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return RTAS_OUT_SUCCESS;
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}
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static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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target_ulong parameter = rtas_ld(args, 0);
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target_ulong buffer = rtas_ld(args, 1);
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target_ulong length = rtas_ld(args, 2);
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target_ulong ret;
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switch (parameter) {
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case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
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char *param_val = g_strdup_printf("MaxEntCap=%d,"
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"DesMem=%" PRIu64 ","
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"DesProcs=%d,"
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"MaxPlatProcs=%d",
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max_cpus,
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current_machine->ram_size / MiB,
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smp_cpus,
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max_cpus);
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ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
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g_free(param_val);
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break;
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}
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case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
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uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
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ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val));
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break;
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}
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case RTAS_SYSPARM_UUID:
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ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
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(qemu_uuid_set ? 16 : 0));
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break;
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default:
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ret = RTAS_OUT_NOT_SUPPORTED;
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}
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rtas_st(rets, 0, ret);
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}
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static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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target_ulong parameter = rtas_ld(args, 0);
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target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
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switch (parameter) {
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case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
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case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
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case RTAS_SYSPARM_UUID:
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ret = RTAS_OUT_NOT_AUTHORIZED;
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break;
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}
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rtas_st(rets, 0, ret);
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}
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static void rtas_ibm_os_term(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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qemu_system_guest_panicked(NULL);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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int32_t power_domain;
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if (nargs != 2 || nret != 2) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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/* we currently only use a single, "live insert" powerdomain for
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* hotplugged/dlpar'd resources, so the power is always live/full (100)
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*/
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power_domain = rtas_ld(args, 0);
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if (power_domain != -1) {
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rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
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return;
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}
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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rtas_st(rets, 1, 100);
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}
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static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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int32_t power_domain;
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if (nargs != 1 || nret != 2) {
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return;
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}
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/* we currently only use a single, "live insert" powerdomain for
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* hotplugged/dlpar'd resources, so the power is always live/full (100)
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*/
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power_domain = rtas_ld(args, 0);
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if (power_domain != -1) {
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rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
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return;
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}
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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rtas_st(rets, 1, 100);
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}
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static struct rtas_call {
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const char *name;
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spapr_rtas_fn fn;
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} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
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target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs, target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
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struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
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if (call->fn) {
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call->fn(cpu, spapr, token, nargs, args, nret, rets);
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return H_SUCCESS;
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}
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}
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/* HACK: Some Linux early debug code uses RTAS display-character,
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* but assumes the token value is 0xa (which it is on some real
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* machines) without looking it up in the device tree. This
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* special case makes this work */
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if (token == 0xa) {
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rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
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return H_SUCCESS;
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}
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hcall_dprintf("Unknown RTAS token 0x%x\n", token);
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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return H_PARAMETER;
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}
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uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
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uint32_t nret, uint64_t rets)
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{
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int token;
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for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
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if (strcmp(cmd, rtas_table[token].name) == 0) {
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SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
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PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
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rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
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nargs, args, nret, rets);
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return H_SUCCESS;
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}
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}
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return H_PARAMETER;
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}
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void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
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{
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assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
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token -= RTAS_TOKEN_BASE;
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assert(!rtas_table[token].name);
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rtas_table[token].name = name;
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rtas_table[token].fn = fn;
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}
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void spapr_dt_rtas_tokens(void *fdt, int rtas)
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{
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int i;
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for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
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struct rtas_call *call = &rtas_table[i];
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if (!call->name) {
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continue;
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}
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_FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
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}
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}
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void spapr_load_rtas(SpaprMachineState *spapr, void *fdt, hwaddr addr)
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{
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int rtas_node;
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int ret;
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/* Copy RTAS blob into guest RAM */
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cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size);
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ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size);
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if (ret < 0) {
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error_report("Couldn't add RTAS reserve entry: %s",
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fdt_strerror(ret));
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exit(1);
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}
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/* Update the device tree with the blob's location */
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rtas_node = fdt_path_offset(fdt, "/rtas");
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assert(rtas_node >= 0);
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ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr);
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if (ret < 0) {
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error_report("Couldn't add linux,rtas-base property: %s",
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fdt_strerror(ret));
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exit(1);
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}
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ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr);
|
|
if (ret < 0) {
|
|
error_report("Couldn't add linux,rtas-entry property: %s",
|
|
fdt_strerror(ret));
|
|
exit(1);
|
|
}
|
|
|
|
ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size);
|
|
if (ret < 0) {
|
|
error_report("Couldn't add rtas-size property: %s",
|
|
fdt_strerror(ret));
|
|
exit(1);
|
|
}
|
|
}
|
|
|
|
static void core_rtas_register_types(void)
|
|
{
|
|
spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
|
|
rtas_display_character);
|
|
spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
|
|
spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
|
|
rtas_system_reboot);
|
|
spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
|
|
rtas_query_cpu_stopped_state);
|
|
spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
|
|
spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
|
|
spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
|
|
"ibm,get-system-parameter",
|
|
rtas_ibm_get_system_parameter);
|
|
spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
|
|
"ibm,set-system-parameter",
|
|
rtas_ibm_set_system_parameter);
|
|
spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
|
|
rtas_ibm_os_term);
|
|
spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
|
|
rtas_set_power_level);
|
|
spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
|
|
rtas_get_power_level);
|
|
}
|
|
|
|
type_init(core_rtas_register_types)
|