qemu-e2k/target
Philippe Mathieu-Daudé b0586b38cb target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit()
MIPS 64-bit ISA is introduced with MIPS3.

Introduce the CPU_MIPS64 definition aliased to the MIPS3 ISA,
and the cpu_type_is_64bit() method to check if a CPU supports
this ISA (thus is 64-bit).

Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210104221154.3127610-5-f4bug@amsat.org>
2021-01-14 17:13:53 +01:00
..
alpha
arm target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns 2021-01-12 21:19:02 +00:00
avr tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
cris
hppa tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
i386 target/i386: Use X86Seg enum for segment registers 2021-01-12 17:05:10 +01:00
lm32
m68k
microblaze tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
mips target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit() 2021-01-14 17:13:53 +01:00
moxie
nios2
openrisc
ppc
riscv tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
rx tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
s390x Remove superfluous timer_del() calls 2021-01-08 15:13:38 +00:00
sh4 tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
sparc tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
tilegx
tricore tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
unicore32
xtensa
meson.build