63 lines
1.5 KiB
C
63 lines
1.5 KiB
C
/*
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* ARMv7M NVIC object
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*
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* Copyright (c) 2017 Linaro Ltd
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* Written by Peter Maydell <peter.maydell@linaro.org>
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*
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* This code is licensed under the GPL version 2 or later.
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*/
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#ifndef HW_ARM_ARMV7M_NVIC_H
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#define HW_ARM_ARMV7M_NVIC_H
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#include "target/arm/cpu.h"
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#include "hw/sysbus.h"
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#include "hw/timer/armv7m_systick.h"
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#define TYPE_NVIC "armv7m_nvic"
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#define NVIC(obj) \
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OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
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/* Highest permitted number of exceptions (architectural limit) */
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#define NVIC_MAX_VECTORS 512
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typedef struct VecInfo {
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/* Exception priorities can range from -3 to 255; only the unmodifiable
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* priority values for RESET, NMI and HardFault can be negative.
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*/
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int16_t prio;
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uint8_t enabled;
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uint8_t pending;
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uint8_t active;
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uint8_t level; /* exceptions <=15 never set level */
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} VecInfo;
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typedef struct NVICState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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ARMCPU *cpu;
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VecInfo vectors[NVIC_MAX_VECTORS];
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uint32_t prigroup;
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/* vectpending and exception_prio are both cached state that can
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* be recalculated from the vectors[] array and the prigroup field.
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*/
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unsigned int vectpending; /* highest prio pending enabled exception */
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int exception_prio; /* group prio of the highest prio active exception */
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MemoryRegion sysregmem;
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MemoryRegion container;
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uint32_t num_irq;
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qemu_irq excpout;
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qemu_irq sysresetreq;
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SysTickState systick;
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} NVICState;
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#endif
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