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qemu-e2k/target-arm
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Fabian Aggeler c0ccb02db4 target-arm: add cpu feature EL3 to CPUs with Security Extensions 
Set ARM_FEATURE_EL3 feature for CPUs that implement Security Extensions.

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1418684992-8996-16-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-22 23:12:28 +00:00
..
arm_ldst.h
arm-semi.c Pass semihosting exit code back to system. 2014-12-11 12:07:48 +00:00
cpu64.c target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" 2014-10-24 12:19:13 +01:00
cpu-qom.h target-arm: Add ARMCPU secure property 2014-12-22 23:12:28 +00:00
cpu.c target-arm: add cpu feature EL3 to CPUs with Security Extensions 2014-12-22 23:12:28 +00:00
cpu.h target-arm: make MAIR0/1 banked 2014-12-11 12:07:52 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target-arm: rename arm_current_pl to arm_current_el 2014-10-24 12:19:14 +01:00
helper-a64.h
helper.c target-arm: Merge EL3 CP15 register lists 2014-12-22 23:12:27 +00:00
helper.h
internals.h target-arm: make TTBCR banked 2014-12-11 12:07:51 +00:00
iwmmxt_helper.c
kvm32.c target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm64.c target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm_arm.h target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm-consts.h
kvm-stub.c
kvm.c target-arm: Check error conditions on kvm_arm_reset_vcpu 2014-12-11 12:07:53 +00:00
machine.c target-arm: Support save/load for 64 bit CPUs 2014-12-11 12:07:53 +00:00
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
neon_helper.c
op_addsub.h
op_helper.c target-arm: make c13 cp regs banked (FCSEIDR, ...) 2014-12-11 12:07:52 +00:00
psci.c target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
translate-a64.c target-arm: A64: remove redundant store 2014-11-02 10:04:34 +03:00
translate.c target-arm: add secure state bit to CPREG hash 2014-12-11 12:07:49 +00:00
translate.h target-arm: add non-secure Translation Block flag 2014-12-11 12:07:48 +00:00