qemu-e2k/include/exec
Richard Henderson d109b46d8d linux-user/aarch64: Implement PROT_MTE
Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2.
Otherwise this does not yet have effect.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16 13:08:46 +00:00
..
user
address-spaces.h
confidential-guest-support.h confidential guest support: Introduce cgs "ready" flag 2021-02-08 16:57:38 +11:00
cpu_ldst.h exec: Rename guest_{addr,range}_valid to *_untagged 2021-02-16 11:04:53 +00:00
cpu-all.h linux-user/aarch64: Implement PROT_MTE 2021-02-16 13:08:46 +00:00
cpu-common.h vl: extract softmmu/globals.c 2020-12-15 12:51:50 -05:00
cpu-defs.h exec/cpu-defs: Remove TCG backends dependency 2021-02-05 10:24:14 -10:00
cputlb.h
exec-all.h exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
gdbstub.h gdbstub: Remove unused gdb_get_float32() and gdb_get_float64() 2021-02-15 09:38:47 +00:00
gen-icount.h tcg: Use tcg_constant_i32 with icount expander 2021-01-13 08:39:08 -10:00
helper-gen.h
helper-head.h
helper-proto.h tcg: Use memset for large vector byte replication 2021-01-04 06:32:58 -10:00
helper-tcg.h
hwaddr.h
ioport.h
log.h tcg: Introduce tcg_splitwx_to_{rx,rw} 2021-01-07 05:09:41 -10:00
memattrs.h
memop.h
memory_ldst_cached.h.inc fuzz: ignore address_space_map is_write flag 2021-02-08 14:43:54 +01:00
memory_ldst_phys.h.inc
memory_ldst.h.inc
memory-internal.h
memory.h memory: alloc RAM from file at offset 2021-02-09 20:53:56 +00:00
plugin-gen.h
poison.h poison: remove GNUC check 2020-12-15 12:53:13 -05:00
ram_addr.h memory: alloc RAM from file at offset 2021-02-09 20:53:56 +00:00
ramblock.h
ramlist.h
softmmu-semi.h
target_page.h
tb-context.h
tb-hash.h
tb-lookup.h
translate-all.h remove TCG includes from common code 2021-01-02 21:03:36 +01:00
translator.h tcg: Make DisasContextBase.tb const 2021-01-07 05:09:41 -10:00