qemu-e2k/target/mips/tcg/octeon.decode
Jiaxun Yang 0e8b3010af target/mips: Cast offset field of Octeon BBIT to int16_t
As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigned. We need to cast it as signed to do address calculation.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00

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# Octeon Architecture Module instruction set
#
# Copyright (C) 2022 Pavel Dovgalyuk
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Branch on bit set or clear
# BBIT0 110010 ..... ..... ................
# BBIT032 110110 ..... ..... ................
# BBIT1 111010 ..... ..... ................
# BBIT132 111110 ..... ..... ................
%bbit_p 28:1 16:5
BBIT 11 set:1 . 10 rs:5 ..... offset:s16 p=%bbit_p
# Arithmetic
# BADDU rd, rs, rt
# DMUL rd, rs, rt
# EXTS rt, rs, p, lenm1
# EXTS32 rt, rs, p, lenm1
# CINS rt, rs, p, lenm1
# CINS32 rt, rs, p, lenm1
# DPOP rd, rs
# POP rd, rs
# SEQ rd, rs, rt
# SEQI rt, rs, immediate
# SNE rd, rs, rt
# SNEI rt, rs, immediate
@r3 ...... rs:5 rt:5 rd:5 ..... ......
%bitfield_p 0:1 6:5
@bitfield ...... rs:5 rt:5 lenm1:5 ..... ..... . p=%bitfield_p
BADDU 011100 ..... ..... ..... 00000 101000 @r3
DMUL 011100 ..... ..... ..... 00000 000011 @r3
EXTS 011100 ..... ..... ..... ..... 11101 . @bitfield
CINS 011100 ..... ..... ..... ..... 11001 . @bitfield
POP 011100 rs:5 00000 rd:5 00000 10110 dw:1
SEQNE 011100 rs:5 rt:5 rd:5 00000 10101 ne:1
SEQNEI 011100 rs:5 rt:5 imm:s10 10111 ne:1