e5c0d3ce40
When a Power cpu with 64-bit hash MMU has it's hash page table (HPT) pointer updated by a write to the SDR1 register we need to update some derived variables. Likewise, when the cpu is configured for an external HPT (one not in the guest memory space) some derived variables need to be updated. Currently the logic for this is (partially) duplicated in ppc_store_sdr1() and in spapr_cpu_reset(). In future we're going to need it in some other places, so make some common helpers for this update. In addition the new ppc_hash64_set_external_hpt() helper also updates SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU synchronization. In a sense this belongs logically in the ppc_hash64_set_sdr1() helper, but that is called from kvm_arch_get_registers() so can't itself call cpu_synchronize_state() without infinite recursion. In practice this doesn't matter because the only other caller is TCG specific. Currently there aren't situations where updating SDR1 at runtime in KVM matters, but there are going to be in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
313 lines
7.1 KiB
C
313 lines
7.1 KiB
C
/*
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* Copyright 2008 IBM Corporation.
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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*/
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#ifndef __KVM_PPC_H__
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#define __KVM_PPC_H__
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#define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
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#ifdef CONFIG_KVM
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uint32_t kvmppc_get_tbfreq(void);
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uint64_t kvmppc_get_clockfreq(void);
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uint32_t kvmppc_get_vmx(void);
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uint32_t kvmppc_get_dfp(void);
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bool kvmppc_get_host_model(char **buf);
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bool kvmppc_get_host_serial(char **buf);
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int kvmppc_get_hasidle(CPUPPCState *env);
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int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
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int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
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void kvmppc_enable_logical_ci_hcalls(void);
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void kvmppc_enable_set_mode_hcall(void);
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void kvmppc_set_papr(PowerPCCPU *cpu);
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int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version);
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void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
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int kvmppc_smt_threads(void);
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int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
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int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
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int kvmppc_set_tcr(PowerPCCPU *cpu);
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int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
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#ifndef CONFIG_USER_ONLY
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off_t kvmppc_alloc_rma(void **rma);
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bool kvmppc_spapr_use_multitce(void);
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void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
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bool need_vfio);
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int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
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int kvmppc_reset_htab(int shift_hint);
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uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
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#endif /* !CONFIG_USER_ONLY */
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bool kvmppc_has_cap_epr(void);
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int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
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bool kvmppc_has_cap_htab_fd(void);
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int kvmppc_get_htab_fd(bool write);
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int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
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int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
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uint16_t n_valid, uint16_t n_invalid);
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uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu, target_ulong pte_index);
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void kvmppc_hash64_free_pteg(uint64_t token);
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void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
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target_ulong pte0, target_ulong pte1);
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bool kvmppc_has_cap_fixup_hcalls(void);
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int kvmppc_enable_hwrng(void);
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int kvmppc_put_books_sregs(PowerPCCPU *cpu);
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#else
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static inline uint32_t kvmppc_get_tbfreq(void)
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{
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return 0;
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}
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static inline bool kvmppc_get_host_model(char **buf)
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{
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return false;
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}
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static inline bool kvmppc_get_host_serial(char **buf)
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{
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return false;
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}
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static inline uint64_t kvmppc_get_clockfreq(void)
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{
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return 0;
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}
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static inline uint32_t kvmppc_get_vmx(void)
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{
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return 0;
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}
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static inline uint32_t kvmppc_get_dfp(void)
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{
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return 0;
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}
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static inline int kvmppc_get_hasidle(CPUPPCState *env)
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{
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return 0;
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}
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static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
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{
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return -1;
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}
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static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
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{
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return -1;
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}
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static inline void kvmppc_enable_logical_ci_hcalls(void)
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{
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}
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static inline void kvmppc_enable_set_mode_hcall(void)
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{
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}
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static inline void kvmppc_set_papr(PowerPCCPU *cpu)
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{
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}
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static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)
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{
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return 0;
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}
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static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
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{
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}
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static inline int kvmppc_smt_threads(void)
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{
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return 1;
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}
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static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
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{
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return 0;
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}
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static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
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{
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return 0;
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}
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static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
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{
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return 0;
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}
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static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
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{
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return -1;
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}
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#ifndef CONFIG_USER_ONLY
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static inline off_t kvmppc_alloc_rma(void **rma)
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{
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return 0;
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}
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static inline bool kvmppc_spapr_use_multitce(void)
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{
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return false;
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}
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static inline void *kvmppc_create_spapr_tce(uint32_t liobn,
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uint32_t window_size, int *fd,
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bool vfio_accel)
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{
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return NULL;
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}
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static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
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uint32_t nb_table)
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{
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return -1;
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}
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static inline int kvmppc_reset_htab(int shift_hint)
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{
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return 0;
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}
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static inline uint64_t kvmppc_rma_size(uint64_t current_size,
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unsigned int hash_shift)
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{
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return ram_size;
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}
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#endif /* !CONFIG_USER_ONLY */
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static inline bool kvmppc_has_cap_epr(void)
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{
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return false;
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}
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static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
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const char *function)
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{
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return -1;
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}
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static inline bool kvmppc_has_cap_htab_fd(void)
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{
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return false;
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}
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static inline int kvmppc_get_htab_fd(bool write)
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{
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return -1;
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}
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static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
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int64_t max_ns)
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{
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abort();
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}
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static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
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uint16_t n_valid, uint16_t n_invalid)
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{
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abort();
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}
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static inline uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu,
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target_ulong pte_index)
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{
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abort();
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}
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static inline void kvmppc_hash64_free_pteg(uint64_t token)
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{
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abort();
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}
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static inline void kvmppc_hash64_write_pte(CPUPPCState *env,
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target_ulong pte_index,
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target_ulong pte0, target_ulong pte1)
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{
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abort();
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}
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static inline bool kvmppc_has_cap_fixup_hcalls(void)
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{
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abort();
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}
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static inline int kvmppc_enable_hwrng(void)
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{
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return -1;
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}
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static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
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{
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abort();
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}
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#endif
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#ifndef CONFIG_KVM
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#define kvmppc_eieio() do { } while (0)
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static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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}
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static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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}
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#else /* CONFIG_KVM */
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#define kvmppc_eieio() \
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do { \
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if (kvm_enabled()) { \
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asm volatile("eieio" : : : "memory"); \
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} \
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} while (0)
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/* Store data cache blocks back to memory */
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static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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uint8_t *p;
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for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
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asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
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}
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}
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/* Invalidate instruction cache blocks */
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static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
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{
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uint8_t *p;
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for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
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asm volatile("icbi 0,%0" : : "r"(p));
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}
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}
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#endif /* CONFIG_KVM */
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#ifndef KVM_INTERRUPT_SET
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#define KVM_INTERRUPT_SET -1
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#endif
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#ifndef KVM_INTERRUPT_UNSET
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#define KVM_INTERRUPT_UNSET -2
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#endif
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#ifndef KVM_INTERRUPT_SET_LEVEL
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#define KVM_INTERRUPT_SET_LEVEL -3
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#endif
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#endif /* __KVM_PPC_H__ */
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