f031c95941
Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
183 lines
5.0 KiB
C
183 lines
5.0 KiB
C
/*
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* I440FX Fuzzing Target
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*
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* Copyright Red Hat Inc., 2019
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*
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* Authors:
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* Alexander Bulekov <alxndr@bu.edu>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/main-loop.h"
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#include "tests/qtest/libqtest.h"
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#include "tests/qtest/libqos/pci.h"
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#include "tests/qtest/libqos/pci-pc.h"
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#include "fuzz.h"
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#include "qos_fuzz.h"
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#define I440FX_PCI_HOST_BRIDGE_CFG 0xcf8
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#define I440FX_PCI_HOST_BRIDGE_DATA 0xcfc
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/*
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* the input to the fuzzing functions below is a buffer of random bytes. we
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* want to convert these bytes into a sequence of qtest or qos calls. to do
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* this we define some opcodes:
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*/
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enum action_id {
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WRITEB,
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WRITEW,
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WRITEL,
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READB,
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READW,
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READL,
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ACTION_MAX
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};
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static void ioport_fuzz_qtest(QTestState *s,
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const unsigned char *Data, size_t Size) {
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/*
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* loop over the Data, breaking it up into actions. each action has an
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* opcode, address offset and value
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*/
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struct {
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uint8_t opcode;
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uint8_t addr;
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uint32_t value;
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} a;
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while (Size >= sizeof(a)) {
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/* make a copy of the action so we can normalize the values in-place */
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memcpy(&a, Data, sizeof(a));
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/* select between two i440fx Port IO addresses */
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uint16_t addr = a.addr % 2 ? I440FX_PCI_HOST_BRIDGE_CFG :
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I440FX_PCI_HOST_BRIDGE_DATA;
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switch (a.opcode % ACTION_MAX) {
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case WRITEB:
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qtest_outb(s, addr, (uint8_t)a.value);
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break;
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case WRITEW:
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qtest_outw(s, addr, (uint16_t)a.value);
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break;
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case WRITEL:
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qtest_outl(s, addr, (uint32_t)a.value);
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break;
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case READB:
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qtest_inb(s, addr);
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break;
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case READW:
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qtest_inw(s, addr);
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break;
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case READL:
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qtest_inl(s, addr);
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break;
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}
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/* Move to the next operation */
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Size -= sizeof(a);
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Data += sizeof(a);
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}
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flush_events(s);
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}
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static void i440fx_fuzz_qtest(QTestState *s,
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const unsigned char *Data,
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size_t Size)
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{
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ioport_fuzz_qtest(s, Data, Size);
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fuzz_reset(s);
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}
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static void pciconfig_fuzz_qos(QTestState *s, QPCIBus *bus,
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const unsigned char *Data, size_t Size) {
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/*
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* Same as ioport_fuzz_qtest, but using QOS. devfn is incorporated into the
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* value written over Port IO
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*/
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struct {
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uint8_t opcode;
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uint8_t offset;
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int devfn;
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uint32_t value;
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} a;
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while (Size >= sizeof(a)) {
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memcpy(&a, Data, sizeof(a));
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switch (a.opcode % ACTION_MAX) {
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case WRITEB:
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bus->config_writeb(bus, a.devfn, a.offset, (uint8_t)a.value);
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break;
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case WRITEW:
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bus->config_writew(bus, a.devfn, a.offset, (uint16_t)a.value);
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break;
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case WRITEL:
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bus->config_writel(bus, a.devfn, a.offset, (uint32_t)a.value);
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break;
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case READB:
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bus->config_readb(bus, a.devfn, a.offset);
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break;
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case READW:
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bus->config_readw(bus, a.devfn, a.offset);
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break;
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case READL:
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bus->config_readl(bus, a.devfn, a.offset);
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break;
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}
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Size -= sizeof(a);
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Data += sizeof(a);
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}
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flush_events(s);
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}
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static void i440fx_fuzz_qos(QTestState *s,
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const unsigned char *Data,
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size_t Size)
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{
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static QPCIBus *bus;
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if (!bus) {
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bus = qpci_new_pc(s, fuzz_qos_alloc);
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}
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pciconfig_fuzz_qos(s, bus, Data, Size);
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}
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static const char *i440fx_qtest_argv = TARGET_NAME " -machine accel=qtest"
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" -m 0 -display none";
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static GString *i440fx_argv(FuzzTarget *t)
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{
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return g_string_new(i440fx_qtest_argv);
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}
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static void register_pci_fuzz_targets(void)
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{
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/* Uses simple qtest commands and reboots to reset state */
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fuzz_add_target(&(FuzzTarget){
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.name = "i440fx-qtest-reboot-fuzz",
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.description = "Fuzz the i440fx using raw qtest commands and "
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"rebooting after each run",
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.get_init_cmdline = i440fx_argv,
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.fuzz = i440fx_fuzz_qtest});
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/*
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* Uses libqos. Doesn't do anything to reset state. Note that if we were to
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* reboot after each run, we would also have to redo the qos-related
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* initialization (qos_init_path)
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*/
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fuzz_add_qos_target(&(FuzzTarget){
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.name = "i440fx-qos-noreset-fuzz",
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.description = "Fuzz the i440fx using raw qtest commands and "
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"rebooting after each run",
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.fuzz = i440fx_fuzz_qos,},
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"i440FX-pcihost",
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&(QOSGraphTestOptions){}
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);
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}
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fuzz_target_init(register_pci_fuzz_targets);
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