cfa29dd506
The value passed is always true. Reviewed-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
123 lines
3.7 KiB
C
123 lines
3.7 KiB
C
/*
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* Internal execution defines for qemu
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#ifndef ACCEL_TCG_INTERNAL_H
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#define ACCEL_TCG_INTERNAL_H
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#include "exec/exec-all.h"
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/*
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* Access to the various translations structures need to be serialised
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* via locks for consistency. In user-mode emulation access to the
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* memory related structures are protected with mmap_lock.
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* In !user-mode we use per-page locks.
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*/
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#ifdef CONFIG_SOFTMMU
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#define assert_memory_lock()
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#else
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#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
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#endif
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typedef struct PageDesc {
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/* list of TBs intersecting this ram page */
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uintptr_t first_tb;
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#ifdef CONFIG_USER_ONLY
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unsigned long flags;
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void *target_data;
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#endif
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#ifdef CONFIG_SOFTMMU
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QemuSpin lock;
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#endif
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} PageDesc;
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/* Size of the L2 (and L3, etc) page tables. */
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#define V_L2_BITS 10
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#define V_L2_SIZE (1 << V_L2_BITS)
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/*
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* L1 Mapping properties
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*/
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extern int v_l1_size;
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extern int v_l1_shift;
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extern int v_l2_levels;
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/*
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* The bottom level has pointers to PageDesc, and is indexed by
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* anything from 4 to (V_L2_BITS + 3) bits, depending on target page size.
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*/
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#define V_L1_MIN_BITS 4
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#define V_L1_MAX_BITS (V_L2_BITS + 3)
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#define V_L1_MAX_SIZE (1 << V_L1_MAX_BITS)
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extern void *l1_map[V_L1_MAX_SIZE];
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PageDesc *page_find_alloc(tb_page_addr_t index, bool alloc);
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static inline PageDesc *page_find(tb_page_addr_t index)
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{
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return page_find_alloc(index, false);
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}
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/* list iterators for lists of tagged pointers in TranslationBlock */
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#define TB_FOR_EACH_TAGGED(head, tb, n, field) \
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for (n = (head) & 1, tb = (TranslationBlock *)((head) & ~1); \
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tb; tb = (TranslationBlock *)tb->field[n], n = (uintptr_t)tb & 1, \
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tb = (TranslationBlock *)((uintptr_t)tb & ~1))
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#define PAGE_FOR_EACH_TB(pagedesc, tb, n) \
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TB_FOR_EACH_TAGGED((pagedesc)->first_tb, tb, n, page_next)
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#define TB_FOR_EACH_JMP(head_tb, tb, n) \
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TB_FOR_EACH_TAGGED((head_tb)->jmp_list_head, tb, n, jmp_list_next)
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/* In user-mode page locks aren't used; mmap_lock is enough */
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#ifdef CONFIG_USER_ONLY
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#define assert_page_locked(pd) tcg_debug_assert(have_mmap_lock())
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static inline void page_lock(PageDesc *pd) { }
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static inline void page_unlock(PageDesc *pd) { }
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#else
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#ifdef CONFIG_DEBUG_TCG
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void do_assert_page_locked(const PageDesc *pd, const char *file, int line);
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#define assert_page_locked(pd) do_assert_page_locked(pd, __FILE__, __LINE__)
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#else
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#define assert_page_locked(pd)
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#endif
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void page_lock(PageDesc *pd);
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void page_unlock(PageDesc *pd);
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#endif
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#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_DEBUG_TCG)
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void assert_no_pages_locked(void);
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#else
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static inline void assert_no_pages_locked(void) { }
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#endif
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TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags,
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int cflags);
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G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
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void page_init(void);
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void tb_htable_init(void);
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void tb_reset_jump(TranslationBlock *tb, int n);
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TranslationBlock *tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
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tb_page_addr_t phys_page2);
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bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
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void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
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uintptr_t host_pc);
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/* Return the current PC from CPU, which may be cached in TB. */
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static inline target_ulong log_pc(CPUState *cpu, const TranslationBlock *tb)
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{
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#if TARGET_TB_PCREL
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return cpu->cc->get_pc(cpu);
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#else
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return tb_pc(tb);
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#endif
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}
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#endif /* ACCEL_TCG_INTERNAL_H */
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