..
cpu-qom.h
cpu: Introduce CPUClass::gdb_{read,write}_register()
2013-07-27 00:04:17 +02:00
cpu.c
cputlb: Change tlb_flush() argument to CPUState
2014-03-13 19:52:47 +01:00
cpu.h
target-mips: Avoid shifting left into sign bit
2014-03-27 19:22:49 +04:00
dsp_helper.c
target-mips: Use macro ARRAY_SIZE where possible
2013-12-09 16:44:04 +01:00
gdbstub.c
cpu: Introduce CPUClass::gdb_{read,write}_register()
2013-07-27 00:04:17 +02:00
helper.c
target-mips: Avoid shifting left into sign bit
2014-03-27 19:22:49 +04:00
helper.h
target-mips: add user-mode FR switch support for MIPS32r5
2014-02-10 16:46:38 +01:00
lmi_helper.c
machine.c
cputlb: Change tlb_flush() argument to CPUState
2014-03-13 19:52:47 +01:00
Makefile.objs
cpu: Introduce CPUClass::gdb_{read,write}_register()
2013-07-27 00:04:17 +02:00
mips-defs.h
target-mips: add CPU definition for MIPS32R5
2014-02-10 16:45:53 +01:00
op_helper.c
target-mips: Avoid shifting left into sign bit
2014-03-27 19:22:49 +04:00
TODO
translate_init.c
target-mips: Avoid shifting left into sign bit
2014-03-27 19:22:49 +04:00
translate.c
target-mips: fix MTHC1 and MFHC1 when FPU in FR=0 mode
2014-03-25 23:36:35 +01:00