qemu-e2k/target
Halil Pasic 7e01376dae s390x/css: fix ilen in IO instruction handlers
When initiating a program check interruption by calling program_interrupt
the instruction length (ilen) of the current instruction is supplied as
the third parameter.

On s390x all the IO instructions are of instruction format S and their
ilen is 4.  The calls to program_interrupt (introduced by commits
7b18aad543 ("s390: Add channel I/O instructions.", 2013-01-24) and
61bf0dcb2e ("s390x/ioinst: Add missing alignment checks for IO
instructions", 2013-06-21)) however use ilen == 2.

This is probably due to a confusion between ilen which specifies the
instruction length in bytes and ILC which does the same but in halfwords.
If kvm_enabled() this does not actually matter, because the ilen
parameter of program_interrupt is effectively unused.

Let's provide the correct ilen to program_interrupt.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Fixes:  7b18aad543 ("s390: Add channel I/O instructions.")
Fixes: 61bf0dcb2e ("s390x/ioinst: Add missing alignment checks for IO instructions")
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20170724143452.55534-1-pasic@linux.vnet.ibm.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-07-25 09:17:42 +02:00
..
alpha tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
arm target/arm: fix TCG temp leak in aarch64 rev16 2017-07-24 17:59:28 +01:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
i386 qapi: Separate type QNull from QObject 2017-07-24 13:35:11 +02:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
microblaze tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
mips target/mips: Enable CP0_EBase.WG on MIPS64 CPUs 2017-07-21 03:23:44 +01:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc qapi: Use QNull for a more regular visit_type_null() 2017-07-24 13:35:11 +02:00
s390x s390x/css: fix ilen in IO instruction handlers 2017-07-25 09:17:42 +02:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
unicore32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00