134 lines
3.9 KiB
C
134 lines
3.9 KiB
C
/*
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* QEMU IDE Emulation: ISA Bus support.
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*
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* Copyright (c) 2003 Fabrice Bellard
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* Copyright (c) 2006 Openedhand Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/isa/isa.h"
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#include "sysemu/dma.h"
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#include "hw/ide/internal.h"
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/***********************************************************/
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/* ISA IDE definitions */
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#define TYPE_ISA_IDE "isa-ide"
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#define ISA_IDE(obj) OBJECT_CHECK(ISAIDEState, (obj), TYPE_ISA_IDE)
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typedef struct ISAIDEState {
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ISADevice parent_obj;
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IDEBus bus;
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uint32_t iobase;
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uint32_t iobase2;
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uint32_t isairq;
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qemu_irq irq;
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} ISAIDEState;
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static void isa_ide_reset(DeviceState *d)
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{
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ISAIDEState *s = ISA_IDE(d);
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ide_bus_reset(&s->bus);
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}
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static const VMStateDescription vmstate_ide_isa = {
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.name = "isa-ide",
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.version_id = 3,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_IDE_BUS(bus, ISAIDEState),
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VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void isa_ide_realizefn(DeviceState *dev, Error **errp)
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{
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ISADevice *isadev = ISA_DEVICE(dev);
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ISAIDEState *s = ISA_IDE(dev);
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ide_bus_new(&s->bus, sizeof(s->bus), dev, 0, 2);
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ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2);
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isa_init_irq(isadev, &s->irq, s->isairq);
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ide_init2(&s->bus, s->irq);
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vmstate_register(dev, 0, &vmstate_ide_isa, s);
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ide_register_restart_cb(&s->bus);
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}
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ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq,
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DriveInfo *hd0, DriveInfo *hd1)
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{
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DeviceState *dev;
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ISADevice *isadev;
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ISAIDEState *s;
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isadev = isa_create(bus, TYPE_ISA_IDE);
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "iobase", iobase);
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qdev_prop_set_uint32(dev, "iobase2", iobase2);
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qdev_prop_set_uint32(dev, "irq", isairq);
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qdev_init_nofail(dev);
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s = ISA_IDE(dev);
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if (hd0) {
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ide_create_drive(&s->bus, 0, hd0);
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}
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if (hd1) {
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ide_create_drive(&s->bus, 1, hd1);
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}
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return isadev;
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}
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static Property isa_ide_properties[] = {
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DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0),
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DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6),
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DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void isa_ide_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = isa_ide_realizefn;
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dc->fw_name = "ide";
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dc->reset = isa_ide_reset;
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dc->props = isa_ide_properties;
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set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
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}
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static const TypeInfo isa_ide_info = {
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.name = TYPE_ISA_IDE,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISAIDEState),
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.class_init = isa_ide_class_initfn,
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};
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static void isa_ide_register_types(void)
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{
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type_register_static(&isa_ide_info);
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}
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type_init(isa_ide_register_types)
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