67 lines
1.9 KiB
C
67 lines
1.9 KiB
C
#ifndef E2K_TARGET_SYSCALL_H
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#define E2K_TARGET_SYSCALL_H
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#define UNAME_MACHINE "e2k"
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#define UNAME_MINUMIM_RELEASE "2.6.32"
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#define E2K_MAXNR 128 /* The total number of */
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/* quad-NRs */
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#define E2K_MAXGR 16 /* The total number of global */
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/* quad-NRs */
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#define E2K_MAXSR (E2K_MAXNR - E2K_MAXGR) /* The total number of stack */
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/* quad-NRs */
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#define E2K_MAXNR_d (E2K_MAXNR * 2) /* The total number of */
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/* double-NRs */
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#define E2K_MAXGR_d (E2K_MAXGR * 2) /* The total number of global */
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/* double-NRs */
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#define E2K_MAXSR_d (E2K_MAXSR * 2) /* The total number of stack */
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/* double-NRs */
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typedef uint64_t e2k_greg_t; // double word
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struct target_pt_regs {
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/* special registers */
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uint64_t wd; // Current window descriptor (WD)
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uint32_t sbr; // User Stack Base Register (USBR/SBR)
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// SBR - contains the base (top) virtual address of the current User Stack area.
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// uint64_t tr; // current type register
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uint32_t psr; // Processor State Register (PSR)
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uint32_t upsr; // User processor status register (UPSR)
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uint64_t ip; // instruction pointer
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uint64_t nip; // next instruction pointer
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uint64_t ctpr1; // Control Transfer Preparation Register (CTPR)
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uint64_t ctpr2;
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uint64_t ctpr3;
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uint32_t pfpfr; // Packed Floating Point Flag Register (PFPFR)
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uint32_t fpcr; // Floating point control register (FPCR)
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uint32_t fpsr; // Floating point state register (FPSR)
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// borrowed from Embox OS
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uint64_t lsr; // Loop status register (LSR)
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uint64_t ilcr; // Loop counter register (ILCR)
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uint64_t dr0;
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uint64_t cr0_hi;
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uint64_t cr1_lo;
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uint64_t cr1_hi;
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uint64_t pcsp_hi;
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uint64_t pcsp_lo;
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uint64_t psp_lo;
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uint64_t psp_hi;
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uint64_t usd_lo; // User data
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uint64_t usd_hi;
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uint64_t gbase[32];
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uint16_t gext[32];
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};
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#endif /* E2K_TARGET_SYSCALL_H */
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