BALATON Zoltan bd20cde50b ppc/pegasos2: Access MV64361 registers via their memory region ... Instead of relying on the mapped address of the MV64361 registers access them via their memory region. This is not a problem at reset time when these registers are mapped at the default address but the guest could change this later and then the RTAS calls accessing PCI config registers could fail. None of the guests actually do this so this only avoids a theoretical problem not seen in practice. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <b6f768023603dc2c4d130720bcecdbea459b7668.1634241019.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2021-10-21 11:42:47 +11:00
..
bonito.c	hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit	2021-07-02 17:34:55 +02:00
designware.c
gpex-acpi.c	Revert "acpi/gpex: Inform os to keep firmware resource map"	2021-08-03 16:32:34 -04:00
gpex.c
grackle.c
i440fx.c	hw/pci: remove all references to find_i440fx function	2021-09-04 17:34:05 -04:00
Kconfig	hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259	2021-07-20 20:10:03 +02:00
meson.build	hw/pci-host: Rename Raven ASIC PCI bridge as raven.c	2021-07-11 22:29:04 +02:00
mv643xx.h
mv64361.c	ppc/pegasos2: Access MV64361 registers via their memory region	2021-10-21 11:42:47 +11:00
pam.c
pnv_phb3_msi.c
pnv_phb3_pbcq.c
pnv_phb3.c
pnv_phb4_pec.c
pnv_phb4.c	hw/pci-hist/pnv_phb4: Fix typo in pnv_phb4_ioda_write	2021-07-26 07:07:07 -10:00
ppce500.c
q35.c	hw/i386: Add a default_bus_bypass_iommu pc machine option	2021-07-16 11:10:45 -04:00
raven.c	pci: Rename pci_root_bus_new_inplace() to pci_root_bus_init()	2021-09-30 13:42:10 +01:00
remote.c
sabre.c
sh_pci.c
trace-events	hw/pci-host/bonito: Trace PCI config accesses smaller than 32-bit	2021-07-02 10:41:16 +02:00
trace.h
uninorth.c
versatile.c	pci: Rename pci_root_bus_new_inplace() to pci_root_bus_init()	2021-09-30 13:42:10 +01:00
xen_igd_pt.c
xilinx-pcie.c