Peter Maydell ce187c3c15 hw/intc/arm_gicv3: Implement functions to identify next pending irq ... Implement the GICv3 logic to recalculate the highest priority pending interrupt for each CPU after some part of the GIC state has changed. We avoid unnecessary full recalculation where possible. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1465915112-29272-11-git-send-email-peter.maydell@linaro.org		2016-06-17 15:23:51 +01:00
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allwinner-a10-pic.h
arm_gic_common.h
arm_gic.h
arm_gicv3_common.h	hw/intc/arm_gicv3: Implement functions to identify next pending irq	2016-06-17 15:23:51 +01:00
arm_gicv3.h	hw/intc/arm_gicv3: ARM GICv3 device framework	2016-06-17 15:23:51 +01:00
aspeed_vic.h	hw/intc: Add (new) ASPEED VIC device model	2016-03-16 17:42:18 +00:00
bcm2835_ic.h
bcm2836_control.h	bcm2836_control: add bcm2836 ARM control logic	2016-02-03 15:00:45 +00:00
imx_avic.h
realview_gic.h