qemu-e2k/tcg
Richard Henderson 45bf0e7aa6 tcg/loongarch64: Set vector registers call clobbered
Because there are more call clobbered registers than
call saved registers, we begin with all registers as
call clobbered and then reset those that are saved.

This was missed when we introduced the LSX support.

Cc: qemu-stable@nongnu.org
Fixes: 16288ded94 ("tcg/loongarch64: Lower basic tcg vec ops to LSX")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2136
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240201233414.500588-1-richard.henderson@linaro.org>
2024-02-03 16:46:10 +10:00
..
aarch64
arm tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct 2024-01-23 13:32:10 +10:00
i386 tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates 2024-01-11 08:46:35 +11:00
loongarch64 tcg/loongarch64: Set vector registers call clobbered 2024-02-03 16:46:10 +10:00
mips
ppc tcg/ppc: Use new registers for LQ destination 2024-01-11 08:47:45 +11:00
riscv
s390x tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns 2024-01-23 13:22:46 +10:00
sparc64 tcg/sparc64: Implement tcg_out_extrl_i64_i32 2023-11-06 10:48:46 -08:00
tci
debuginfo.c accel/tcg: Move perf and debuginfo support to tcg/ 2024-01-29 21:04:10 +10:00
meson.build accel/tcg: Move perf and debuginfo support to tcg/ 2024-01-29 21:04:10 +10:00
optimize.c tcg/optimize: Canonicalize sub2 with constants to add2 2023-11-06 10:43:04 -08:00
perf.c accel/tcg: Move perf and debuginfo support to tcg/ 2024-01-29 21:04:10 +10:00
region.c tcg: Make the cleanup-on-error path unique 2024-01-23 13:22:46 +10:00
tcg-common.c
tcg-internal.h
tcg-ldst.c.inc
tcg-op-gvec.c tcg: Don't free vector results 2023-11-06 08:27:21 -08:00
tcg-op-ldst.c tcg: Reduce serial context atomicity earlier 2023-12-12 13:35:19 -08:00
tcg-op-vec.c
tcg-op.c tcg: Canonicalize subi to addi during opcode generation 2023-11-06 10:43:04 -08:00
tcg-pool.c.inc
tcg.c accel/tcg: Move perf and debuginfo support to tcg/ 2024-01-29 21:04:10 +10:00
tci.c