qemu-e2k/target/mips
Mateja Marjanovic 37b9aae2e6 target/mips: Preparing for adding MMI instructions
Set up MMI code to be compiled only for TARGET_MIPS64. This is
needed so that GPRs are 64 bit, and combined with MMI registers,
they will form full 128 bit registers.

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551183797-13570-2-git-send-email-mateja.marjanovic@rt-rk.com>
2019-02-27 14:26:14 +01:00
..
cp0_timer.c
cpu-qom.h
cpu.c
cpu.h
dsp_helper.c
gdbstub.c
helper.c
helper.h
internal.h
kvm_mips.h
kvm.c
lmi_helper.c
machine.c
Makefile.objs
mips-defs.h
mips-semi.c
msa_helper.c
op_helper.c
TODO
trace-events
translate_init.inc.c
translate.c target/mips: Preparing for adding MMI instructions 2019-02-27 14:26:14 +01:00