504 lines
14 KiB
C
504 lines
14 KiB
C
/*
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* QEMU S390x floating interrupt controller (flic)
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*
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* Copyright 2014 IBM Corp.
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* Author(s): Jens Freimann <jfrei@linux.vnet.ibm.com>
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* Cornelia Huck <cornelia.huck@de.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or (at
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* your option) any later version. See the COPYING file in the top-level
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* directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "qemu/main-loop.h"
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#include "qemu/module.h"
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#include "hw/sysbus.h"
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#include "hw/s390x/ioinst.h"
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#include "hw/s390x/s390_flic.h"
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#include "hw/qdev-properties.h"
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#include "hw/s390x/css.h"
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#include "trace.h"
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#include "qapi/error.h"
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#include "hw/s390x/s390-virtio-ccw.h"
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S390FLICStateClass *s390_get_flic_class(S390FLICState *fs)
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{
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static S390FLICStateClass *class;
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if (!class) {
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/* we only have one flic device, so this is fine to cache */
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class = S390_FLIC_COMMON_GET_CLASS(fs);
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}
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return class;
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}
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QEMUS390FLICState *s390_get_qemu_flic(S390FLICState *fs)
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{
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static QEMUS390FLICState *flic;
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if (!flic) {
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/* we only have one flic device, so this is fine to cache */
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flic = QEMU_S390_FLIC(fs);
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}
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return flic;
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}
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S390FLICState *s390_get_flic(void)
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{
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static S390FLICState *fs;
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if (!fs) {
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fs = S390_FLIC_COMMON(object_resolve_path_type("",
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TYPE_S390_FLIC_COMMON,
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NULL));
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}
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return fs;
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}
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void s390_flic_init(void)
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{
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DeviceState *dev;
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if (kvm_enabled()) {
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dev = qdev_new(TYPE_KVM_S390_FLIC);
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object_property_add_child(qdev_get_machine(), TYPE_KVM_S390_FLIC,
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OBJECT(dev));
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} else {
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dev = qdev_new(TYPE_QEMU_S390_FLIC);
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object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC,
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OBJECT(dev));
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}
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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}
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static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id,
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uint8_t isc, bool swap,
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bool is_maskable, uint8_t flags)
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{
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/* nothing to do */
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return 0;
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}
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static int qemu_s390_io_adapter_map(S390FLICState *fs, uint32_t id,
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uint64_t map_addr, bool do_map)
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{
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/* nothing to do */
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return 0;
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}
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static int qemu_s390_add_adapter_routes(S390FLICState *fs,
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AdapterRoutes *routes)
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{
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return -ENOSYS;
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}
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static void qemu_s390_release_adapter_routes(S390FLICState *fs,
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AdapterRoutes *routes)
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{
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}
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static int qemu_s390_clear_io_flic(S390FLICState *fs, uint16_t subchannel_id,
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uint16_t subchannel_nr)
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{
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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QEMUS390FlicIO *cur, *next;
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uint8_t isc;
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g_assert(qemu_mutex_iothread_locked());
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if (!(flic->pending & FLIC_PENDING_IO)) {
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return 0;
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}
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/* check all iscs */
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for (isc = 0; isc < 8; isc++) {
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if (QLIST_EMPTY(&flic->io[isc])) {
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continue;
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}
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/* search and delete any matching one */
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QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
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if (cur->id == subchannel_id && cur->nr == subchannel_nr) {
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QLIST_REMOVE(cur, next);
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g_free(cur);
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}
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}
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/* update our indicator bit */
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if (QLIST_EMPTY(&flic->io[isc])) {
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flic->pending &= ~ISC_TO_PENDING_IO(isc);
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}
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}
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return 0;
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}
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static int qemu_s390_modify_ais_mode(S390FLICState *fs, uint8_t isc,
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uint16_t mode)
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{
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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switch (mode) {
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case SIC_IRQ_MODE_ALL:
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flic->simm &= ~AIS_MODE_MASK(isc);
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flic->nimm &= ~AIS_MODE_MASK(isc);
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break;
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case SIC_IRQ_MODE_SINGLE:
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flic->simm |= AIS_MODE_MASK(isc);
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flic->nimm &= ~AIS_MODE_MASK(isc);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int qemu_s390_inject_airq(S390FLICState *fs, uint8_t type,
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uint8_t isc, uint8_t flags)
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{
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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S390FLICStateClass *fsc = s390_get_flic_class(fs);
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bool flag = flags & S390_ADAPTER_SUPPRESSIBLE;
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uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
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if (flag && (flic->nimm & AIS_MODE_MASK(isc))) {
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trace_qemu_s390_airq_suppressed(type, isc);
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return 0;
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}
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fsc->inject_io(fs, 0, 0, 0, io_int_word);
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if (flag && (flic->simm & AIS_MODE_MASK(isc))) {
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flic->nimm |= AIS_MODE_MASK(isc);
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trace_qemu_s390_suppress_airq(isc, "Single-Interruption Mode",
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"NO-Interruptions Mode");
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}
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return 0;
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}
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static void qemu_s390_flic_notify(uint32_t type)
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{
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CPUState *cs;
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/*
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* We have to make all CPUs see CPU_INTERRUPT_HARD, so they might
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* consider it. We will kick all running CPUs and only relevant
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* sleeping ones.
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*/
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CPU_FOREACH(cs) {
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S390CPU *cpu = S390_CPU(cs);
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cs->interrupt_request |= CPU_INTERRUPT_HARD;
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/* ignore CPUs that are not sleeping */
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if (s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING &&
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s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD) {
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continue;
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}
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/* we always kick running CPUs for now, this is tricky */
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if (cs->halted) {
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/* don't check for subclasses, CPUs double check when waking up */
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if (type & FLIC_PENDING_SERVICE) {
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if (!(cpu->env.psw.mask & PSW_MASK_EXT)) {
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continue;
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}
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} else if (type & FLIC_PENDING_IO) {
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if (!(cpu->env.psw.mask & PSW_MASK_IO)) {
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continue;
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}
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} else if (type & FLIC_PENDING_MCHK_CR) {
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if (!(cpu->env.psw.mask & PSW_MASK_MCHECK)) {
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continue;
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}
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}
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}
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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}
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}
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uint32_t qemu_s390_flic_dequeue_service(QEMUS390FLICState *flic)
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{
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uint32_t tmp;
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g_assert(qemu_mutex_iothread_locked());
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g_assert(flic->pending & FLIC_PENDING_SERVICE);
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tmp = flic->service_param;
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flic->service_param = 0;
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flic->pending &= ~FLIC_PENDING_SERVICE;
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return tmp;
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}
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/* caller has to free the returned object */
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QEMUS390FlicIO *qemu_s390_flic_dequeue_io(QEMUS390FLICState *flic, uint64_t cr6)
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{
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QEMUS390FlicIO *io;
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uint8_t isc;
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g_assert(qemu_mutex_iothread_locked());
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if (!(flic->pending & CR6_TO_PENDING_IO(cr6))) {
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return NULL;
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}
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for (isc = 0; isc < 8; isc++) {
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if (QLIST_EMPTY(&flic->io[isc]) || !(cr6 & ISC_TO_ISC_BITS(isc))) {
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continue;
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}
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io = QLIST_FIRST(&flic->io[isc]);
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QLIST_REMOVE(io, next);
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/* update our indicator bit */
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if (QLIST_EMPTY(&flic->io[isc])) {
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flic->pending &= ~ISC_TO_PENDING_IO(isc);
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}
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return io;
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}
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return NULL;
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}
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void qemu_s390_flic_dequeue_crw_mchk(QEMUS390FLICState *flic)
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{
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g_assert(qemu_mutex_iothread_locked());
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g_assert(flic->pending & FLIC_PENDING_MCHK_CR);
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flic->pending &= ~FLIC_PENDING_MCHK_CR;
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}
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static void qemu_s390_inject_service(S390FLICState *fs, uint32_t parm)
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{
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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g_assert(qemu_mutex_iothread_locked());
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/* multiplexing is good enough for sclp - kvm does it internally as well */
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flic->service_param |= parm;
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flic->pending |= FLIC_PENDING_SERVICE;
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qemu_s390_flic_notify(FLIC_PENDING_SERVICE);
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}
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static void qemu_s390_inject_io(S390FLICState *fs, uint16_t subchannel_id,
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uint16_t subchannel_nr, uint32_t io_int_parm,
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uint32_t io_int_word)
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{
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const uint8_t isc = IO_INT_WORD_ISC(io_int_word);
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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QEMUS390FlicIO *io;
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g_assert(qemu_mutex_iothread_locked());
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io = g_new0(QEMUS390FlicIO, 1);
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io->id = subchannel_id;
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io->nr = subchannel_nr;
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io->parm = io_int_parm;
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io->word = io_int_word;
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QLIST_INSERT_HEAD(&flic->io[isc], io, next);
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flic->pending |= ISC_TO_PENDING_IO(isc);
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qemu_s390_flic_notify(ISC_TO_PENDING_IO(isc));
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}
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static void qemu_s390_inject_crw_mchk(S390FLICState *fs)
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{
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QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
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g_assert(qemu_mutex_iothread_locked());
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flic->pending |= FLIC_PENDING_MCHK_CR;
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qemu_s390_flic_notify(FLIC_PENDING_MCHK_CR);
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}
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bool qemu_s390_flic_has_service(QEMUS390FLICState *flic)
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{
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/* called without lock via cc->has_work, will be validated under lock */
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return !!(flic->pending & FLIC_PENDING_SERVICE);
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}
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bool qemu_s390_flic_has_io(QEMUS390FLICState *flic, uint64_t cr6)
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{
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/* called without lock via cc->has_work, will be validated under lock */
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return !!(flic->pending & CR6_TO_PENDING_IO(cr6));
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}
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bool qemu_s390_flic_has_crw_mchk(QEMUS390FLICState *flic)
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{
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/* called without lock via cc->has_work, will be validated under lock */
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return !!(flic->pending & FLIC_PENDING_MCHK_CR);
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}
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bool qemu_s390_flic_has_any(QEMUS390FLICState *flic)
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{
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g_assert(qemu_mutex_iothread_locked());
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return !!flic->pending;
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}
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static void qemu_s390_flic_reset(DeviceState *dev)
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{
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QEMUS390FLICState *flic = QEMU_S390_FLIC(dev);
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QEMUS390FlicIO *cur, *next;
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int isc;
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g_assert(qemu_mutex_iothread_locked());
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flic->simm = 0;
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flic->nimm = 0;
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flic->pending = 0;
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/* remove all pending io interrupts */
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for (isc = 0; isc < 8; isc++) {
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QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
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QLIST_REMOVE(cur, next);
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g_free(cur);
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}
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}
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}
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bool ais_needed(void *opaque)
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{
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S390FLICState *s = opaque;
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return s->ais_supported;
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}
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static const VMStateDescription qemu_s390_flic_vmstate = {
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.name = "qemu-s390-flic",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = ais_needed,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8(simm, QEMUS390FLICState),
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VMSTATE_UINT8(nimm, QEMUS390FLICState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void qemu_s390_flic_instance_init(Object *obj)
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{
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QEMUS390FLICState *flic = QEMU_S390_FLIC(obj);
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int isc;
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for (isc = 0; isc < 8; isc++) {
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QLIST_INIT(&flic->io[isc]);
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}
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}
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static void qemu_s390_flic_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);
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dc->reset = qemu_s390_flic_reset;
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dc->vmsd = &qemu_s390_flic_vmstate;
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fsc->register_io_adapter = qemu_s390_register_io_adapter;
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fsc->io_adapter_map = qemu_s390_io_adapter_map;
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fsc->add_adapter_routes = qemu_s390_add_adapter_routes;
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fsc->release_adapter_routes = qemu_s390_release_adapter_routes;
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fsc->clear_io_irq = qemu_s390_clear_io_flic;
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fsc->modify_ais_mode = qemu_s390_modify_ais_mode;
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fsc->inject_airq = qemu_s390_inject_airq;
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fsc->inject_service = qemu_s390_inject_service;
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fsc->inject_io = qemu_s390_inject_io;
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fsc->inject_crw_mchk = qemu_s390_inject_crw_mchk;
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}
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static Property s390_flic_common_properties[] = {
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DEFINE_PROP_UINT32("adapter_routes_max_batch", S390FLICState,
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adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void s390_flic_common_realize(DeviceState *dev, Error **errp)
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{
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S390FLICState *fs = S390_FLIC_COMMON(dev);
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uint32_t max_batch = fs->adapter_routes_max_batch;
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if (max_batch > ADAPTER_ROUTES_MAX_GSI) {
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error_setg(errp, "flic property adapter_routes_max_batch too big"
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" (%d > %d)", max_batch, ADAPTER_ROUTES_MAX_GSI);
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return;
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}
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fs->ais_supported = s390_has_feat(S390_FEAT_ADAPTER_INT_SUPPRESSION);
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}
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static void s390_flic_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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device_class_set_props(dc, s390_flic_common_properties);
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dc->realize = s390_flic_common_realize;
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}
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static const TypeInfo qemu_s390_flic_info = {
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.name = TYPE_QEMU_S390_FLIC,
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.parent = TYPE_S390_FLIC_COMMON,
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.instance_size = sizeof(QEMUS390FLICState),
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.instance_init = qemu_s390_flic_instance_init,
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.class_init = qemu_s390_flic_class_init,
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};
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static const TypeInfo s390_flic_common_info = {
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.name = TYPE_S390_FLIC_COMMON,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(S390FLICState),
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.class_init = s390_flic_class_init,
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.class_size = sizeof(S390FLICStateClass),
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};
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static void qemu_s390_flic_register_types(void)
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{
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type_register_static(&s390_flic_common_info);
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type_register_static(&qemu_s390_flic_info);
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}
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type_init(qemu_s390_flic_register_types)
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static bool adapter_info_so_needed(void *opaque)
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{
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return css_migration_enabled();
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}
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const VMStateDescription vmstate_adapter_info_so = {
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.name = "s390_adapter_info/summary_offset",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = adapter_info_so_needed,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(summary_offset, AdapterInfo),
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VMSTATE_END_OF_LIST()
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}
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};
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const VMStateDescription vmstate_adapter_info = {
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.name = "s390_adapter_info",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT64(ind_offset, AdapterInfo),
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/*
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* We do not have to migrate neither the id nor the addresses.
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* The id is set by css_register_io_adapter and the addresses
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|
* are set based on the IndAddr objects after those get mapped.
|
|
*/
|
|
VMSTATE_END_OF_LIST()
|
|
},
|
|
.subsections = (const VMStateDescription * []) {
|
|
&vmstate_adapter_info_so,
|
|
NULL
|
|
}
|
|
};
|
|
|
|
const VMStateDescription vmstate_adapter_routes = {
|
|
|
|
.name = "s390_adapter_routes",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.fields = (VMStateField[]) {
|
|
VMSTATE_STRUCT(adapter, AdapterRoutes, 1, vmstate_adapter_info,
|
|
AdapterInfo),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|