qemu-e2k/target/riscv
Philippe Mathieu-Daudé 7ebbd9d0b6 target/riscv: Rename tcg_cpu_FOO() to include 'riscv'
The tcg_cpu_FOO() names are riscv specific, so rename
them as riscv_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240111120221.35072-6-philmd@linaro.org>
2024-01-19 12:28:59 +01:00
..
insn_trans target/riscv: Add support for Zacas extension 2024-01-10 18:47:47 +10:00
kvm target/riscv/kvm: add RVV and Vector CSR regs 2024-01-10 18:47:47 +10:00
tcg target/riscv: Rename tcg_cpu_FOO() to include 'riscv' 2024-01-19 12:28:59 +01:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h target/riscv: Add M-mode virtual interrupt and IRQ filtering support. 2023-11-07 11:02:17 +10:00
cpu_cfg.h target/riscv: implement svade 2024-01-10 18:47:47 +10:00
cpu_helper.c target/riscv: Don't adjust vscause for exceptions 2024-01-10 18:47:47 +10:00
cpu_user.h
cpu_vendorid.h
cpu-param.h
cpu-qom.h target/riscv: add rva22s64 cpu 2024-01-10 18:47:47 +10:00
cpu.c target/riscv: Ensure mideleg is set correctly on reset 2024-01-10 18:47:47 +10:00
cpu.h target/riscv: add 'parent' in profile description 2024-01-10 18:47:47 +10:00
crypto_helper.c
csr.c target/riscv: Assert that the CSR numbers will be correct 2024-01-10 18:47:47 +10:00
debug.c target/riscv: Allocate itrigger timers only once 2023-09-11 11:45:55 +10:00
debug.h target/riscv: Allocate itrigger timers only once 2023-09-11 11:45:55 +10:00
fpu_helper.c
gdbstub.c target/riscv: rename ext_icsr to ext_zicsr 2023-11-07 11:02:17 +10:00
helper.h
insn16.decode
insn32.decode target/riscv: Add support for Zacas extension 2024-01-10 18:47:47 +10:00
instmap.h
internals.h target/riscv: Use env_archcpu() in [check_]nanbox() 2023-11-07 12:13:27 +01:00
Kconfig
m128_helper.c
machine.c target/riscv: Constify VMState in machine.c 2023-12-29 11:17:30 +11:00
meson.build target/riscv: move KVM only files to kvm subdir 2023-10-12 12:20:24 +10:00
monitor.c
op_helper.c
pmp.c target/riscv: pmp: Ignore writes when RW=01 and MML=0 2024-01-10 18:47:47 +10:00
pmp.h target/riscv/pmp: Use hwaddr instead of target_ulong for RV32 2024-01-10 18:47:46 +10:00
pmu.c target/riscv: Add "pmu-mask" property to replace "pmu-num" 2023-11-07 11:06:02 +10:00
pmu.h target/riscv: Use existing PMU counter mask in FDT generation 2023-11-07 11:06:02 +10:00
riscv-qmp-cmds.c riscv-qmp-cmds.c: add profile flags in cpu-model-expansion 2024-01-10 18:47:47 +10:00
sbi_ecall_interface.h
time_helper.c
time_helper.h
trace-events
trace.h
translate.c target/riscv: Add support for Zacas extension 2024-01-10 18:47:47 +10:00
vcrypto_helper.c
vector_helper.c target/riscv: Fix vfwmaccbf16.vf 2023-10-12 12:50:13 +10:00
vector_internals.c
vector_internals.h
xthead.decode
XVentanaCondOps.decode
zce_helper.c