Andreas Färber 8c2e1b0093 cpu: Turn cpu_has_work() into a CPUClass hook ...

Default to false.

Tidy variable naming and inline cast uses while at it.

Tested-by: Jia Liu <proljc@gmail.com> (or32)
Signed-off-by: Andreas Färber <afaerber@suse.de>

2014-03-13 19:01:49 +01:00

..

core-dc232b

target-xtensa: add dc232b core

2011-10-16 10:40:02 +00:00

core-dc233c

target-xtensa: add dc233c core

2012-04-15 17:43:16 +00:00

core-fsf

target-xtensa: add fsf core

2011-10-16 10:40:16 +00:00

core-dc232b.c

target-xtensa: refactor standard core configuration

2014-02-24 04:47:02 +04:00

core-dc233c.c

target-xtensa: refactor standard core configuration

2014-02-24 04:47:02 +04:00

core-fsf.c

target-xtensa: refactor standard core configuration

2014-02-24 04:47:02 +04:00

cpu-qom.h

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

cpu.c

cpu: Turn cpu_has_work() into a CPUClass hook

2014-03-13 19:01:49 +01:00

cpu.h

cpu: Turn cpu_has_work() into a CPUClass hook

2014-03-13 19:01:49 +01:00

gdbstub.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

helper.c

target-xtensa: Clean up ENV_GET_CPU() usage

2014-03-13 19:01:49 +01:00

helper.h

target-xtensa: add basic checks to icache opcodes

2014-02-24 04:47:01 +04:00

Makefile.objs

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

op_helper.c

target-xtensa: add basic checks to icache opcodes

2014-02-24 04:47:01 +04:00

overlay_tool.h

target-xtensa: provide HW confg ID registers

2014-02-24 04:47:02 +04:00

translate.c

target-xtensa: provide HW confg ID registers

2014-02-24 04:47:02 +04:00

xtensa-semi.c

exec: Change cpu_memory_rw_debug() argument to CPUState

2013-07-23 02:41:33 +02:00