6e42be7cd1
A transition from CPUFooState to FooCPU can be considered safe,
just like FooCPU::env access in the opposite direction.
The only benefit of the FOO_CPU() casts would be protection against
bogus CPUFooState pointers, but then surrounding code would likely
break, too.
This should slightly improve interrupt etc. performance when going from
CPUFooState to FooCPU.
For any additional CPU() casts see 3556c233d9
(qom: allow turning cast debugging off).
Reported-by: Anthony Liguori <aliguori@us.ibm.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
108 lines
3.0 KiB
C
108 lines
3.0 KiB
C
/*
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* QEMU x86 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_I386_CPU_QOM_H
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#define QEMU_I386_CPU_QOM_H
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#include "qom/cpu.h"
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#include "cpu.h"
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#include "qapi/error.h"
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#ifdef TARGET_X86_64
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#define TYPE_X86_CPU "x86_64-cpu"
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#else
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#define TYPE_X86_CPU "i386-cpu"
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#endif
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#define X86_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(X86CPUClass, (klass), TYPE_X86_CPU)
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#define X86_CPU(obj) \
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OBJECT_CHECK(X86CPU, (obj), TYPE_X86_CPU)
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#define X86_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU)
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/**
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* X86CPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* An x86 CPU model or family.
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*/
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typedef struct X86CPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} X86CPUClass;
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/**
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* X86CPU:
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* @env: #CPUX86State
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*
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* An x86 CPU.
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*/
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typedef struct X86CPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUX86State env;
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/* Features that were filtered out because of missing host capabilities */
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uint32_t filtered_features[FEATURE_WORDS];
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} X86CPU;
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static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
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{
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return container_of(env, X86CPU, env);
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}
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#define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
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#define ENV_OFFSET offsetof(X86CPU, env)
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#ifndef CONFIG_USER_ONLY
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extern const struct VMStateDescription vmstate_x86_cpu;
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#endif
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/**
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* x86_cpu_do_interrupt:
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* @cpu: vCPU the interrupt is to be handled by.
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*/
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void x86_cpu_do_interrupt(CPUState *cpu);
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int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
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int cpuid, void *opaque);
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int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
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int cpuid, void *opaque);
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int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
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void *opaque);
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int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
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void *opaque);
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void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
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Error **errp);
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void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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int flags);
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#endif
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