Leon Alrae
dc520a7dee
hw/mips_malta: remove redundant irq and clock init
...
Global smp_cpus is never zero (even if user provides -smp 0), thus clocks
and irqs are always initialized for each created CPU in the loop at the
beginning of mips_malta_init.
These two lines cause a leak of already allocated timer and irqs for the
first CPU - remove them.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30 09:13:59 +01:00
..
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