df9ffb726f
The bochs dispi interface traditionally uses port 0x1ce as 16bit index register and port 0x1cf as 16bit data register. The later is unaligned, and probably for that reason the the data register was moved to 0x1d0 for non-x86 archs. This patch makes the data register available at 0x1d0 on x86 too. The old x86 location is kept for compatibility reasons, so both 0x1cf and 0x1d0 can be used as data register on x86. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
66 lines
1.7 KiB
Plaintext
66 lines
1.7 KiB
Plaintext
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QEMU Standard VGA
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=================
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Exists in two variants, for isa and pci.
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command line switches:
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-vga std [ picks isa for -M isapc, otherwise pci ]
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-device VGA [ pci variant ]
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-device isa-vga [ isa variant ]
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PCI spec
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--------
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Applies to the pci variant only for obvious reasons.
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PCI ID: 1234:1111
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PCI Region 0:
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Framebuffer memory, 16 MB in size (by default).
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Size is tunable via vga_mem_mb property.
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PCI Region 1:
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Reserved (so we have the option to make the framebuffer bar 64bit).
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PCI Region 2:
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MMIO bar, 4096 bytes in size (qemu 1.3+)
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PCI ROM Region:
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Holds the vgabios (qemu 0.14+).
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IO ports used
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-------------
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03c0 - 03df : standard vga ports
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01ce : bochs vbe interface index port
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01cf : bochs vbe interface data port (x86 only)
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01d0 : bochs vbe interface data port
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Memory regions used
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-------------------
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0xe0000000 : Framebuffer memory, isa variant only.
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The pci variant used to mirror the framebuffer bar here, qemu 0.14+
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stops doing that (except when in -M pc-$old compat mode).
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MMIO area spec
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--------------
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Likewise applies to the pci variant only for obvious reasons.
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0000 - 03ff : reserved, for possible virtio extension.
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0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1.
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word access is supported, bytes are written
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in little endia order (aka index port first),
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so indexed registers can be updated with a
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single mmio write (and thus only one vmexit).
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0500 - 0515 : bochs dispi interface registers, mapped flat
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without index/data ports. Use (index << 1)
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as offset for (16bit) register access.
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