qemu-e2k/target
Luwei Kang ddc2fc9e4e target/i386: set the CPUID level to 0x14 on old machine-type
The CPUID level need to be set to 0x14 manually on old
machine-type if Intel PT is enabled in guest. E.g. the
CPUID[0].EAX(level)=7 and CPUID[7].EBX[25](intel-pt)=1 when the
Qemu with "-machine pc-i440fx-3.1 -cpu qemu64,+intel-pt" parameter.

Some Intel PT capabilities are exposed by leaf 0x14 and the
missing capabilities will cause some MSRs access failed.
This patch add a warning message to inform the user to extend
the CPUID level.

Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Message-Id: <1584031686-16444-1-git-send-email-luwei.kang@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-31 19:13:32 -03:00
..
alpha x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
arm target/arm: fix incorrect current EL bug in aarch32 exception emulation 2020-03-30 13:55:32 +01:00
cris x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
hppa x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
i386 target/i386: set the CPUID level to 0x14 on old machine-type 2020-03-31 19:13:32 -03:00
lm32 x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
m68k x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
microblaze x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
mips target/mips: Fix loongson multimedia condition instructions 2020-03-28 14:09:45 -07:00
moxie cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
nios2 x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
openrisc x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
ppc hw/ppc: Take QEMU lock when calling ppc_dcr_read/write() 2020-03-24 11:56:37 +11:00
riscv x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
rx target/rx: Dump bytes for each insn during disassembly 2020-03-19 17:58:05 +01:00
s390x x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
sh4 x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
sparc x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
tilegx cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
tricore cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
unicore32 tcg: Search includes from the project root source directory 2020-01-15 15:13:10 -10:00
xtensa x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00