155 lines
5.3 KiB
C
155 lines
5.3 KiB
C
/*
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* KQEMU header
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*
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* Copyright (c) 2004-2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef KQEMU_H
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#define KQEMU_H
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#if defined(__i386__)
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#define KQEMU_PAD32(x) x
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#else
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#define KQEMU_PAD32(x)
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#endif
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#define KQEMU_VERSION 0x010400
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struct kqemu_segment_cache {
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uint16_t selector;
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uint16_t padding1;
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uint32_t flags;
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uint64_t base;
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uint32_t limit;
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uint32_t padding2;
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};
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struct kqemu_cpu_state {
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uint64_t regs[16];
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uint64_t eip;
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uint64_t eflags;
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struct kqemu_segment_cache segs[6]; /* selector values */
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struct kqemu_segment_cache ldt;
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struct kqemu_segment_cache tr;
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struct kqemu_segment_cache gdt; /* only base and limit are used */
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struct kqemu_segment_cache idt; /* only base and limit are used */
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uint64_t cr0;
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uint64_t cr2;
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uint64_t cr3;
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uint64_t cr4;
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uint64_t a20_mask;
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/* sysenter registers */
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uint64_t sysenter_cs;
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uint64_t sysenter_esp;
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uint64_t sysenter_eip;
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uint64_t efer;
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uint64_t star;
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uint64_t lstar;
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uint64_t cstar;
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uint64_t fmask;
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uint64_t kernelgsbase;
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uint64_t tsc_offset;
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uint64_t dr0;
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uint64_t dr1;
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uint64_t dr2;
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uint64_t dr3;
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uint64_t dr6;
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uint64_t dr7;
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uint8_t cpl;
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uint8_t user_only;
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uint16_t padding1;
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uint32_t error_code; /* error_code when exiting with an exception */
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uint64_t next_eip; /* next eip value when exiting with an interrupt */
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uint32_t nb_pages_to_flush; /* number of pages to flush,
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KQEMU_FLUSH_ALL means full flush */
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#define KQEMU_MAX_PAGES_TO_FLUSH 512
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#define KQEMU_FLUSH_ALL (KQEMU_MAX_PAGES_TO_FLUSH + 1)
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int32_t retval;
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/* number of ram_dirty entries to update */
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uint32_t nb_ram_pages_to_update;
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#define KQEMU_MAX_RAM_PAGES_TO_UPDATE 512
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#define KQEMU_RAM_PAGES_UPDATE_ALL (KQEMU_MAX_RAM_PAGES_TO_UPDATE + 1)
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#define KQEMU_MAX_MODIFIED_RAM_PAGES 512
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uint32_t nb_modified_ram_pages;
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};
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struct kqemu_init {
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uint8_t *ram_base; /* must be page aligned */
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KQEMU_PAD32(uint32_t padding1;)
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uint64_t ram_size; /* must be multiple of 4 KB */
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uint8_t *ram_dirty; /* must be page aligned */
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KQEMU_PAD32(uint32_t padding2;)
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uint64_t *pages_to_flush; /* must be page aligned */
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KQEMU_PAD32(uint32_t padding4;)
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uint64_t *ram_pages_to_update; /* must be page aligned */
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KQEMU_PAD32(uint32_t padding5;)
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uint64_t *modified_ram_pages; /* must be page aligned */
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KQEMU_PAD32(uint32_t padding6;)
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};
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#define KQEMU_IO_MEM_RAM 0
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#define KQEMU_IO_MEM_ROM 1
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#define KQEMU_IO_MEM_COMM 2 /* kqemu communication page */
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#define KQEMU_IO_MEM_UNASSIGNED 3 /* any device: return to application */
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struct kqemu_phys_mem {
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uint64_t phys_addr; /* physical address range: phys_addr,
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phys_addr + size */
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uint64_t size;
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uint64_t ram_addr; /* corresponding ram address */
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uint32_t io_index; /* memory type: see KQEMU_IO_MEM_xxx */
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uint32_t padding1;
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};
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#define KQEMU_RET_ABORT (-1)
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#define KQEMU_RET_EXCEPTION 0x0000 /* 8 low order bit are the exception */
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#define KQEMU_RET_INT 0x0100 /* 8 low order bit are the interrupt */
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#define KQEMU_RET_SOFTMMU 0x0200 /* emulation needed (I/O or
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unsupported INSN) */
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#define KQEMU_RET_INTR 0x0201 /* interrupted by a signal */
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#define KQEMU_RET_SYSCALL 0x0300 /* syscall insn */
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#ifdef _WIN32
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#define KQEMU_EXEC CTL_CODE(FILE_DEVICE_UNKNOWN, 1, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
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#define KQEMU_INIT CTL_CODE(FILE_DEVICE_UNKNOWN, 2, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define KQEMU_GET_VERSION CTL_CODE(FILE_DEVICE_UNKNOWN, 3, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define KQEMU_MODIFY_RAM_PAGES CTL_CODE(FILE_DEVICE_UNKNOWN, 4, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define KQEMU_SET_PHYS_MEM CTL_CODE(FILE_DEVICE_UNKNOWN, 5, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#else
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#define KQEMU_EXEC _IOWR('q', 1, struct kqemu_cpu_state)
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#define KQEMU_INIT _IOW('q', 2, struct kqemu_init)
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#define KQEMU_GET_VERSION _IOR('q', 3, int)
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#define KQEMU_MODIFY_RAM_PAGES _IOW('q', 4, int)
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#define KQEMU_SET_PHYS_MEM _IOW('q', 5, struct kqemu_phys_mem)
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#endif
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#endif /* KQEMU_H */
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