fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
109 lines
2.8 KiB
C
109 lines
2.8 KiB
C
/*
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* x86 shift helpers
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#define DATA_BITS (1 << (3 + SHIFT))
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#define SHIFT_MASK (DATA_BITS - 1)
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#if DATA_BITS <= 32
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#define SHIFT1_MASK 0x1f
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#else
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#define SHIFT1_MASK 0x3f
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#endif
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#if DATA_BITS == 8
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#define SUFFIX b
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#define DATA_MASK 0xff
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#elif DATA_BITS == 16
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#define SUFFIX w
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#define DATA_MASK 0xffff
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#elif DATA_BITS == 32
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#define SUFFIX l
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#define DATA_MASK 0xffffffff
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#elif DATA_BITS == 64
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#define SUFFIX q
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#define DATA_MASK 0xffffffffffffffffULL
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#else
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#error unhandled operand size
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#endif
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target_ulong glue(helper_rcl, SUFFIX)(CPUX86State *env, target_ulong t0,
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target_ulong t1)
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{
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int count, eflags;
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target_ulong src;
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target_long res;
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count = t1 & SHIFT1_MASK;
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#if DATA_BITS == 16
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count = rclw_table[count];
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#elif DATA_BITS == 8
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count = rclb_table[count];
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#endif
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if (count) {
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eflags = env->cc_src;
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t0 &= DATA_MASK;
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src = t0;
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res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
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if (count > 1) {
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res |= t0 >> (DATA_BITS + 1 - count);
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}
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t0 = res;
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env->cc_src = (eflags & ~(CC_C | CC_O)) |
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(lshift(src ^ t0, 11 - (DATA_BITS - 1)) & CC_O) |
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((src >> (DATA_BITS - count)) & CC_C);
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}
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return t0;
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}
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target_ulong glue(helper_rcr, SUFFIX)(CPUX86State *env, target_ulong t0,
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target_ulong t1)
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{
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int count, eflags;
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target_ulong src;
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target_long res;
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count = t1 & SHIFT1_MASK;
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#if DATA_BITS == 16
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count = rclw_table[count];
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#elif DATA_BITS == 8
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count = rclb_table[count];
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#endif
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if (count) {
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eflags = env->cc_src;
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t0 &= DATA_MASK;
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src = t0;
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res = (t0 >> count) |
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((target_ulong)(eflags & CC_C) << (DATA_BITS - count));
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if (count > 1) {
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res |= t0 << (DATA_BITS + 1 - count);
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}
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t0 = res;
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env->cc_src = (eflags & ~(CC_C | CC_O)) |
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(lshift(src ^ t0, 11 - (DATA_BITS - 1)) & CC_O) |
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((src >> (count - 1)) & CC_C);
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}
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return t0;
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}
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#undef DATA_BITS
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#undef SHIFT_MASK
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#undef SHIFT1_MASK
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#undef DATA_TYPE
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#undef DATA_MASK
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#undef SUFFIX
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