Petar Jovanovic 736d120af4 target-mips: add user-mode FR switch support for MIPS32r5 ...

Description of UFR feature:

Required in MIPS32r5 if floating point is implemented and user-mode FR
switching is supported. The UFR register allows user-mode to clear StatusFR
by executing a CTC1 to UFR with GPR[0] as input, and read StatusFR by
executing a CFC1 to UFR.

helper_ctc1 has been extended with an additional parameter rt to check
requirements for UFR feature.
Definition of mips32r5-generic has been modified to include support for UFR.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>

2014-02-10 16:46:38 +01:00

..

cpu-qom.h

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

cpu.c

cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"

2013-07-29 15:29:15 +02:00

cpu.h

target-mips: add support for CP0_Config5

2014-02-10 16:46:28 +01:00

dsp_helper.c

target-mips: Use macro ARRAY_SIZE where possible

2013-12-09 16:44:04 +01:00

gdbstub.c

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

helper.c

target-mips: fix get_physical_address() #if 0 build error

2013-08-28 19:28:02 +02:00

helper.h

target-mips: add user-mode FR switch support for MIPS32r5

2014-02-10 16:46:38 +01:00

lmi_helper.c

target-mips: Implement Loongson Multimedia Instructions

2012-09-19 21:40:48 +02:00

machine.c

…

Makefile.objs

cpu: Introduce CPUClass::gdb_{read,write}_register()

2013-07-27 00:04:17 +02:00

mips-defs.h

target-mips: add CPU definition for MIPS32R5

2014-02-10 16:45:53 +01:00

op_helper.c

target-mips: add user-mode FR switch support for MIPS32r5

2014-02-10 16:46:38 +01:00

TODO

target-mips: Change TODO file

2012-10-31 21:37:24 +01:00

translate_init.c

target-mips: add user-mode FR switch support for MIPS32r5

2014-02-10 16:46:38 +01:00

translate.c

target-mips: add user-mode FR switch support for MIPS32r5

2014-02-10 16:46:38 +01:00