Anton Blanchard e04c5dd139 target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE ... A few small optimisations: In VSX_LOAD_SCALAR_DS() we can don't need to read the VSR via get_cpu_vsrh(). Split VSX_VECTOR_LOAD_STORE() into two functions. Loads only need to write the VSRs (set_cpu_vsr*()) and stores only need to read the VSRs (get_cpu_vsr*()) Thanks to Mark Cave-Ayland for the suggestions. Signed-off-by: Anton Blanchard <anton@ozlabs.org> Message-Id: <20190509103545.4a7fa71a@kryten> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2019-05-29 11:39:45 +10:00
..
dfp-impl.inc.c	target/ppc: move FP and VMX registers into aligned vsr register array	2019-01-09 09:28:14 +11:00
dfp-ops.inc.c
fp-impl.inc.c	target/ppc: Style fixes for translate/fp-impl.inc.c	2019-04-26 11:37:57 +10:00
fp-ops.inc.c
spe-impl.inc.c	target/ppc: Use tcg_gen_abs_i32	2019-05-13 22:52:08 +00:00
spe-ops.inc.c
vmx-impl.inc.c	tcg: Specify optional vector requirements with a list	2019-05-13 14:44:03 -07:00
vmx-ops.inc.c
vsx-impl.inc.c	target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE	2019-05-29 11:39:45 +10:00
vsx-ops.inc.c