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e0d002f17d
qemu-e2k/target-mips
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Aurelien Jarno e0d002f17d target-mips: use deposit instead of hardcoded version 
Use the deposit op instead of and hardcoded bit field insertion. It
allows the host to emit the corresponding instruction if available.

At the same time remove the (lsb > msb) test. The MIPS64R2 instruction
set manual says "Because of the instruction format, lsb can never be
greater than msb, so there is no UNPREDICATABLE case for this
instruction."

(Bug reported as LP:1071149.)
Cc: Никита Канунников <n.kanunnikov@sbtcom.ru>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:48 +01:00
..
cpu-qom.h target-mips: QOM'ify CPU 2012-04-30 11:32:13 +02:00
cpu.c target-mips: Start QOM'ifying CPU init 2012-04-30 11:32:13 +02:00
cpu.h target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
dsp_helper.c target-mips: Add ASE DSP accumulator instructions 2012-10-31 21:37:20 +01:00
helper.c target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
helper.h target-mips: implement unaligned loads using TCG 2012-10-31 22:20:47 +01:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Add ASE DSP internal functions 2012-10-31 20:24:05 +01:00
mips-defs.h
op_helper.c target-mips: implement unaligned loads using TCG 2012-10-31 22:20:47 +01:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate_init.c target-mips: Add ASE DSP processors 2012-10-31 21:37:20 +01:00
translate.c target-mips: use deposit instead of hardcoded version 2012-10-31 22:20:48 +01:00